Research On Key Technologies For Bundled-data Asynchronous Circuits

Along with the semiconductor process steps into the deep submicron stage, the standard synchronous circuit design has encountered unprecedented challenges in the digital Integrate Circuits (IC) design field. The asynchronous circuits design based on single-rail coding and bundled-data delay model has been considered as a promising approach in this research area. Since bundled-data asynchronous circuits can achieve the small silicon area cost and lower power dissipation. Furthermore, the design flow in bundled-data asynchronous circuits is compatible with single-rail synchronous circuits. However, there are several disadvantages in bundled-data asynchronous circuits, such as poor process transplant-ability, weak anti-differential power analysis (anti-DPA), etc. Moreover, the existing methodologies for bundled-data asynchronous circuits still cannot satisfy the requirements arising from the VLSI design in the deep submicron stage. In this dissertation, the focus is mainly on several problems for design methodologies of the bundled-data asynchronous circuits as follows:Firstly,the power efficiency of different asynchronous circuit design, as well as the energy property of the asynchronous C-element based on different logical styles and their processes, is discussed after the introduction of fundamental theories on power dissipation and low-power design for the digital IC.Secondly, the architecture of the bundled-data asynchronous pipelines is studied. In this part, the principles for low-power four-phase handshake controllers are introduced. The structures and non-linear pipelines implementations of three kinds of high-performance bundled-data asynchronous pipelines, i.e., GasP, IPCMOS and MOUSETRAP, are developed, along with analysis of a simple transistor delay model applied on those three architectures. After that, optimization design scheme for MOUSETRAP-structure is proposed to improve the power-efficiency without reducing its performance. And three common data latches used in asynchronous pipelines circuits are introduced in terms of power-efficiency. The fore-mentioned research in bundled-data asynchronous pipeline architectures can be used as guides in the selection and optimization of the asynchronous-pipelines.The methods for designing large-scale bundled-data asynchronous circuits using EDA tools for synchronous circuits are developed based on the study on Balsa, an asynchronous synthesis kit. The bundled-data asynchronous circuits design flow in Balsa is improved in the following aspects: the data path circuit is implemented by half-custom design methodology, and the handshake channel is designed with full-custom design flow and handshake component synthesis technologies based on Balsa. A new four-phase handshake controller——R-element is proposed. The implementation and research on Balsa asynchronous components based on R-element solve the more performance-loss problems in the Balsa asynchronous circuits design. A tunable delay mechanism based on multi-delay's power supply is used to improve the technology transplant-ability of the bundled-data asynchronous circuits.The research on the anti-DPA attacks methods for bundled-data asynchronous circuits is carried out. The mathematical model and simulating platform on DPA attack based on"correlation"are introduced. The anti-DPA attack countermeasure of inserting random delay chains is used in bundled-data asynchronous circuit designs, and one of using dual-rail logic is developed, these countermeasures improve the anti-DPA attacking performance with the appropriate hardware cost. These researches are significance to the resource-limited embedded data-security encrypt chip designs.Finally, the low-power design technologies used for designing the full-custom bundled-data asynchronous circuits are discussed by introducing the detail design of an asynchronous Advanced Encryption Standard (AES) S-box. Moreover, some technologies discussed in this dissertation, such as the optimizing design flow based on Balsa and the anti-DPA attack methods et al., are deeply valuated and studied.