A Research On RTS Noise In Ultra Deep Submicron MOS Devices

Original and high-electric field induced border traps that closely relate to the singularity of the field is known to be one of the main factors which affect the quality and reliability of metal oxide semiconductor (MOS) devices. With the aggressive scaling down of MOSFETs channel length and gate oxide thickness, the magnitude of noise induced by border traps during device operation becomes larger and larger compared with that of signals. At the same time, the characters of noise degrades from 1/f noise to random telegraph signal (RTS) noise in deep-sub-micron MOSFETs, which makes the reliability issues much more susceptible to the randomicity in analysis and the complexity in characterization.After an in-depth research on the measurement techniques of low-frequency noise in semiconductor devices, a virtual instrumental measurement system for RTS noise in deep submicron MOS devices is established. Using digital filter, parameters extraction method of RTS noise is improved to be more precise, reliable and swifter in the automatic function fitting process than the traditional ones. Detailed analysis is made for factors might affect the errors of system measurement. And as a solution, a series of techniques, such as adjusting device bias, cut off frequency and magnitude of the amplifier, are adopted. This new system is shown to be accurate and sensitive by the measurement results of the 90nm MOS devices.Under the help of this system, physical mechanism of carriers exchange between border traps and channel or gate electrode of MOSFETs is systematically investigated. It is proved to be true that the exchange of carriers between border traps and poly silicon gate electrode is an integral mechanism of both thermal activation and tunneling. Further, a model for poly silicon gate electrode is built, based on which, a time constants model of RTS noise is built. Taking the merits of Hung's and Gérard's models, a new RTS amplitude model is developed under the consideration of the mobility fluctuations, carrier number fluctuations and gate influences, by which the wide range distribution of RTS amplitudes is successfully explained. In the new model, absolute RTS amplitudes are used to simplify the parameter extraction process and eliminate system errors. Besides, models describing the relations of RTS noise and device bias are also established, in which all the parameters used are easy to be acquired or measured, as makes the model more adaptable in real application of defects analysis. Experiment results show that gate electrode also plays a vital role in the carrier capture and emission of the traps, and this model is capable of picturing the influence of the trapped charge on channel current.Finally, using this model, a new method of locating the trap position along the channel is acquired by a forward and reverse RTS noise measuring in MOS devices under non-saturation operation. This method can not only locate trap position precisely, but also avoid similar possible damage of devices to Zeynep's method. Moreover, methods for extraction of trap depth, energy level and scattering cross-section are improved. Laboratory measurements show that methods rendered in this paper surpass the traditional ones both in precision and usability. Once employing the above-mentioned new methods in the researches of traps in gate oxides, failure mechanisms can be analyzed microscopically, and more effective reliability evaluation approaches would be achieved.