Breakdown Model And New Structures Of SOI Lateral High Voltage Devices

SOI HVIC (Silicon On Insulator High Voltage Integrated Circuit) is the mainstream and trend of the Power Integrated Circuit (PIC) due to the improved isolation, reduced leakage current, high speed performance, low power dissipation, and perfect irradiation hardness. As one of the key device in SOI HVIC, SOI lateral high voltage device has been deeply investigated in this field. It is shown that the breakdown voltage of SOI power device is lower than 600V due to the restriction of the vertical blocking capacity, which limits the application of 1000V-level SOI HVIC. Moreover, the conventional RESURF criterion of silicon device is still used on the design of SOI high voltage device, however, the buried oxide layer prevents the depletion region expanding into the substrate and thus brings about some new characteristic in SOI RESURF effect, and these effects are always neglected.In this thesis, the breakdown voltage problem of SOI lateral high voltage device is addressed. A unified breakdown model of S-RESURF (Single REduced SURface Field) device with varied drift doping profiles and a unified breakdown model of D-RESURF (Double REduced SURface Field) device with varied P-top doping profiles are firstly proposed. Two new SOI devices with Step Buried Oxide fixed Charge (SBOC) and Charge Captured Trenches (CCT) are developed, which break the vertical breakdown limitation of the conventional SOI device. The partial experiments are carried out.A unified breakdown model of SOI S-RESURF device with varied drift doping profiles is proposed and an S-RESURF criterion including the charge sharing effect in depletion region and the electric field modulating effect of buried oxide layer is firstly derived. By solving 2-D Poisson equation, the analytical description of the 2-D electric field and potential distributions of the device with uniform, step and linear drift doping profiles for the completely and incompletely drift regions are given. The impact of the geometry parameters and drift doping concentration on breakdown voltage is investigated for the varied drift doping profiles. An optimized drift doping profile and a minimized step number are derived to carry out a uniform surface electric field and thus maximize the breakdown voltage. Experimentally, the 250V and 1.6Ωmm2 LDMOS with two step drift doping profiles have been fabricated on the 3 urn-thick top silicon film and 1.5μm-thick buried oxide layer. The measured results have shown that the two step doping profiles bring about an increase in the breakdown voltage by as much as 57% , and also a decrease in the on-resistance by as much as 11% in comparison to the conventional uniformly doped drift device. The numerical andexperimental results have been shown to support the theoretical model for both the incompletely and completely depleted drift region.A unified breakdown model of SOI D-RESURF device with varied P-top doping profiles is developed and a D-RESURF criterion for SOI high voltage device is demonstrated for the first time. Based on solving 2-D Poisson equation, the 2-D analytical models of SOI D-RESURF device with uniform, step and linear P-top doping profiles are proposed, respectively. The three mentioned models form an integrated breakdown theory for the D-RESURF SOI device. The relationship between the structural parameters and breakdown characteristic is studied. A RESURF Doping Optimal Region (DOR) for optimizing the drift region concentration is given and extended into the design of the SOI device with double drift layer. A theoretical optimum P-top doping distribution and a minimum step-number criterion are firstly reported to realize the tradeoff among the performance, structure and process. The analytical model is verified by numerical simulations and published experimental data. A new SOI high voltage device with step buried oxide layer charge (SBOC) is proposed. Firstly, a new theory, INBOLF (INcreased Buried Oxide Layer Field) theory, is proposed to improve the vertical breakdown voltage by increasing the electric field of buried oxide layer. This breakdown theory brings out a new approach to improve the vertical blocking capacity in SOI high voltage device. Based on the theory, the immobile charges are implemented into the upper surface of buried oxide layer to increase the vertical electric field and uniform the lateral one. The 2-D Poisson's equation is solved to demonstrate the modulation effect of the fixed interface charges and analyze the electric field and breakdown voltage at the various geometric parameters and step number for the new SBOC device. In the lateral direction, the new device can increase the electric field of buried oxide layer from the conventional 90V/um to the critical value of SiO2 600V/um. In the vertical direction, a near uniform surface electric field can be obtained by optimizing the distribution of the fixed interface charges. As a result, 1200V breakdown voltage is firstly realized in a structure with top Si layer of 3um, buried oxide layer of 2u.m and drift length of 70um. The breakdown voltage is only 190V for the conventional device with the same geometry parameters.A new SOI high voltage device with single-sided or double-sided charge captured trench (CCT) is proposed. For the novel structure on the reverse-biased state, high density interface charge increasing from the source to the drain are distributed on the...