Thin Silicon Oxide Reliability And Breakdown Mechanism In The Study

In this paper, the electrical performance and breakdown mechanism of thin silicon oxidehave been discussed The values of Q_bd,V_ini and â–³V_bd of MOS capacitors with differentthicknesses and gate oxide areas under different current densities were measured The Weibulldistributions of these parameters were used to analyze the behavior of electrons when theytransport across thin oxideThe cntical trap density N_bd is related to the quanity of Si-O bonds that will be destroyedalong the direction of electric field So it is a constan when the oxide thickness is fixed And itincreaes as the oxide thicknss increases W(J) is taken as the proportion of the whole electronswhich can generate a trap And N_bd is expressed as below (?) Anotherexpression can also be given as below N_bd=â–³N₁+â–³N₂+…+â–³N_n, it is shown that trapsgenerated under differnt curreat stresses can be accumulated together Under constant currentstress, Q_bd has a linear relationship with InJ Under one oxide thickness, W(J) increases as currentdensity increases, and N_bd is a constant,so Q_bd decreases as current density increases Under onecurrent density both W(J) and N_bd increase as oxide thickness increases, so the Q_bd of differentoxide thickness does not vary a lot under the influence of these 2 factorsThe value of filled trap density n is measurable, and the ratio of filled trap density n totrap density N is defined as occupation probability P(J), which can be expressed asP(J) = (?) Under a certain current density, the P(J) is a constant Under constant currentstress, n_bd has a linear relationship with InJ Under one oxide thickness, P(J) decreases as currentdensity increases, since trapping cross section o decreases and impact cross section β increases,so n_bd decreases as current density increases Under one current density, P(J) increases and N_bddecreases as the oxide thickness decreases Under the influence of these 2 factors, n_bd increases asoxide thickness decreaseslt ls fOund that the traP generation the accelerates under conm cmnt Sbess And underconStan Curren stress, the PercenIage of generated traPs to NN is related tO the lncrement of gateuw avvoltage to A Vbo, that ls of ac eq.Based on the exPresslon ln(ln(l -F l ))-ln(-ln(1 -F2))=ln(S l lS2), the Wel bul l dlstnbutlons of 2dlW gate oxide areas are analyZed, and lt ls concluded that the bird beak effect caused byLOcos process does not lnnuence the measurement resultS The F-N fOrmula IS slmpllfied and(,+,yta The ha measured under conStan amnt srtssan exPresslon ls glven as below tod oc e, The ha measured under conm amni sbessls used to predlct the lIfetlme of devlces under normal worklng condltlon The effectlve oxldethlckness ded of eary failure defect ls expressed as below d- == d. .e When theboelectrOns lnJect frOm polyslllcon, Qbo ls less and traP generatlon rate ls hlghef, whlch 1s probablycaused by the loca1 electncal field Strength enhancement and concentrated electrOn lnJecton atthe roughness ofpolyslllconlslllcon ox1de lnterfaCeAt the same tlme, the lnfluence of plasma chnylng and lon bombardment on the qualny ofslllcon oxlde are analyzed It ls suggested that chnylng effect occurs when nonunlform plasmaexlstS aboVe wafer And plasma nonunlformlty ls lnfiuenced by gaS pressure and power suPply((V --AV,llAccoralng to the chnylng current exvresslon J, = J,] l -- explVj], lt ls snown\ L kL )j, lt ls snownthat chnylng current ls nOt only lnfluenced by plasma nonunlfOrmlty AV,, bu also lnfluencedby gate oxlde voltag V. when tUnnellng cimnt ls generated Dunng the process of poIysIllconovereteh, the sldewaIl of gate oxlde 1s bombarded by lons wlth 1ncldent path nOt Perpendlcular towafer surface, whIch damage gate oxldeAll of our work ls based on the Statlstlcal method, so our concluslons are bel1evable andappllcable...