Study On Critical Techniques Of Storage System Based On Non-Volatile Memory

Hard Disk, as an external storage media, cannot match the requirement of the IO access capability in modern storage architecture; it is difficult to address the problem of power consumption and capacity extension for main memories and caches based on DRAM and SRAM. The restriction to the overall performance of the computer coming from the storage system becomes increasingly apparent.The advanced non-volatile memories, which can be used as cache, main memory or hard disk, have shown great potential for the development of the computer storage architecture, but there are a number of disadvantages for their practical applications.The advantages on higher integration, lower static power consumption and non-volatility are demonstrated by the advanced non-volatile memories, such as Flash,Spin-Torque Transfer RAM(STT-RAM), Phase Change Memory(PCM) and Resistor RAM(RRAM), compared with the traditional storage media. However, some drawbacks also exist. The write latency of STT-RAM is longer than traditional SRAM; PCM performs worse than traditional DRAM on write endurance and inconsistency of write and read; the problems of short lifetime and random write performance deterioration restrict the applications of SSD based on Flash.In this paper, some crucial techniques of advanced non-volatile memories are investigated in terms of cache, main memory and hard disk.With regard to CPU cache, a hybrid parallel and serial STT-RAM architecture are proposed. Its triple-level-cell memory cell architecture and logic of write and read are studied in this paper. It’s proved that the proposed architecture has higher storage density than single-level-cell STT-RAM theoretically. Furthermore, the cache of the proposed STT-RAM architecture is implemented by using a novel page-classification mapping method and page swapping method. The simulations reveal that the novel architecture improves the cache capacity and decrease the power consumption.For main memory, this paper studied that how to reduce energy consumption and read/write access latency of PCM. A page-classification mapping method based on cache-covering and coupling-read\write is proposed to reduce the read and write latency of the MLC PCM cell. It is shown in simulations that the method can improve the cache hit ratio and reduce the power consumption, write operations times as well as access latency.In terms of hard disk level, a cached-page level mapping FTL algorithm(CP-FTL)is proposed. This algorithm utilizes the main memory as the page level mapping memory, and implements an efficient memory update and replacement strategy. Thus,the performance of the mapping and flash IO is improved. The simulations demonstrate that the performance of the proposed algorithm is close to the theoretical optimal value.The relationship between endurance and self-healing time, bad block rate and retentiontime based on the Oxide-degradation model and Cell-recovery model is also analyzed.Based on the study, a method to extend the lifetime of SSD and reuse SSD is presented.