Design And Implementation Of 60GHz CMOS Transmitter

With the rapid development of wireless communication in the past decades, the data rate has increased from several kbps to hundreds of Mbps. However, multi-media business and high definition video data services pose even greater demands on the communication data rate. However, since the spectrum below 6GHz is very crowed, to achieve several Gbps data rate,60 GHz band represents a potential candidate for the next generation wireless communication. Due to its low power consumption and low cost feature, CMOS technology is the preferred to realize the 60 GHz communication system. However, to realize 60 GHz RF front-end system on a chip, there are still many problems to be solved. To improve the competitive ability of China in mm-wave chip design, this dissertation focuses on the 60GHz transmitter design. Below summarizes the main content and contributions of this thesis:1) A variety of 60GHz CMOS power amplifier are designed and implementated. Cosnidering low fmax., low operating voltage, and high loss of bulk technology of CMOS process in the millimeter wave band, this thesis proposed and applied a series of new circuit techniques, a) capacitive neutralization pseudo-differential common source amplifier has the advantages of high gain, stable, and high isolation. To prove these features, rigorous mathematical derivations are given; b) transformer-based power combining technique is used to improve the output power, feauring small area and low loss; c) a new inter-stage matching technique is proposed, reducing the insertion loss. With above techniques, two high power power amplifier are implemented. The measured perforemance is given as follows.4-way power combining power amplifier:24.5dB gain,18dBm Psat,13% PAEmax; 8-way power combining power amplifier:25dB gain,20.6 dBm Psat,17.4dBm OPIdB, 16%PAEmax. According to requirements of power amplifier in the transmitter, a power amplifer with asymmetric power supply is designed. By optimizing circuits and layout, this amplifier overcomes the impact of asymmetric power supply. The simulation results show that the amplifier gain is more than 30dB, Psat is 19dBm, and PAEmax is 16%. In order to address bandwidth issue of the power amplifier, based on switched capacitor techniques, a frequency tunable power amplifier is designed. Simulation results show that the amplifier can cover the four channels of IEEE 802.15.3c standard, and the gain flatness is less than ldB. In order to increase the output power, the amplifier increases transistor size to the limit, and the output power is more than 16 dBm by using only one way differential amplifier. To sum up, compared with the state-of-the-art results, these power amplifiers achive very good performance, such as gain, output power, power efficiency and bandwidth.2) A 60 GHz CMOs up-conversion mixer is designed and fabricated. This mixer employs double balanced Gilbert structure. In particular, differential LO (Local Oscillator) and RF (Radio Frequency) buffer are used to reduce the driving power of the local oscillator signal and to increases the output RF signal linearity, respectively. With the help of the transformer-based matching network, the mixer area is compact and the gain flatness is also very good. In summary, the mixer achieves high gain, and low loss. It covers the four channels of 60GHz standard, and the gain flatness is less than 1.5 dB. Neglecting the LO buffer power consumption, the mixer comsumes only 32 mW power, and achieves OP1dB of 2.5 dBm and conversion gain of 14 dB.3) As a part of fully integrated CMOS transceiver, a 60 GHz transmitter is designed and implemented. After calculating the system link budget, the requirements of each block are given. With the siliding-IF architecture, the design difficulty of IQ quadrature modulator is relaxed. After analyzing the relations between EVM and transimitter non-ideal factors, the design goal and the design key points of each circuit is presented. Finally, the transmitter test results are given. The test results show the transmitter achieves the maximum data rate of 10.6 Gbps and the output mean power of 11.52 dBm. Moreover, the transmitter demonstrated EVM of-14dB (QPSK) and-21dB, (16QAM), respectively, which meets the requirements of the IEEE standards. With antenna, the transceiver achieved the data rate of 3.5 Gbps (7Gbps), the transmission distance of 6m (4m), respectively, meeting our project requirements. Compared with other state-of-the-art fully integrated 60 GHz transceiver, this transceiver performance is very competitive.