Research And Optimization Design For Step-up Power Management Integrated Circuits With High Performance

With the rapid development of microelectronics and semiconductor process, power management ICs have been widely used in the areas of communication network, computer,automobile electronics and portable electronic products. In recent years, the requirement of high performance is improving year by year. High efficiency, high reliability, high integration and low cost are the four most importment research directions.Following the market trend, regarding the boost DC-DC converter as the research object, this dissertation is focused on the control theory and structures of key circuit. Due to the low efficiency and poor reliability of conventional ICs, some optimization plan and realization circuits are proposed. The main work and innovations of this dissertation are as follows.1. Due to the shortage for the current sensing circuits of conventional high-power Boost DC-DC controller, a noval technique with fast transient response and high accuracy is presented. This circuitry is applied for sensing the current flowing through the DC resistance of the inductor to obtain the current information. The FTRC is compensating the process offsets of the transistors that can higher the current-sensing accuracy, and providing an additional current feedback loop to decreasing the transient response time. The current is not existed in the extra feedback loop when the circuit reaches equilibrium state, so the additional quisescent dissipation will not be introduced. The circuit has a large common mode voltage range, hency it is suitable for the wide-input, high-power and high-efficiency applications.2. In view of the low-efficiency of the conventional high-power boost DC-DC controller with a light load, the article presents a novel tri-mode loop method and its real circuits. It is known that from the analysis of the compositions of the system power dissipations, unreasonable control scheme is one of the most important reasons that causes low-efficiency. Based on the methods of conventional, an improved technique is proposed to improve the efficiency with mode changing among PWM, Burst and Sleep. This loop control method has high accuracy and is suitable for wide load applications.3. This dissertation provides an optimal PCB layout scheme by analyzing the equivalent model of the loop circuit of the high-power boost DC-DC controller. The high frequency noise that generated by the parasitic inductances and the parasitic capacitances is reduced by modifying the placement and routing of PCB. Stability and efficiency of the system are improved by the new PCB scheme.4. This dissertation is proposed a low-power hysteretic current mode boost DC-DC converter with ultra-low startup voltage, low output ripple and high efficiency, which is suitable to be used as a power supply for the accurate voltage controll, high efficiency and low-voltage supply applications. A startup module is introduced to reducing the power supply threshold. When the input voltage is not high enough to supply the system, the power transistors are regulated by the module to pull up the interenal supply volagte. This procedure will not stop until the internal supply voltage is high enough to guarantee the system working as normal. Therefore, the battery service life will be increased as well. A novel double-transistor hysteretic current sensing circuit is also introducd to generate the fixed-current-control window, which defines the value of output voltage ripple and does not change with variable current loads. Hence, not only does this circuit provide a low output voltage ripple, bust also insures the system stability. An auto-mode-changed technique that can choose a suitable operation mode by detecting the load of the system is proposed. This chip enters into power save mode and shuts down most of the sub-circuits and power switching devices when the load current is light enough, and improves the system efficiency.5. To limit the large inrush current at startup stage, a novel double-stage start-up structure for the current mode charge pump that can automatically switch operation mode is proposed. The conventional start-up procedure is changed to limit the inrush current at the initial stage and the model switching stage with two additional states introducing. The technique is easy to achieve and increases a few chip areas that suits for integation.6. The effect of charge injection is happening when the MOSFET swtiches of automatic-conversion-mode-change charge pump are turned off, which could induce the switch-induced error voltage. A high frequency spike voltage is generated, and two resultslarge output voltage ripple and low system efficiency are introduced. To reduce the effect of the phenomenon, an equivalent model of the switches topological structure for thecharge pump is proposed, and a series of expressions for the switch-induced error voltage and the spike voltage are derived. The adverse impact can be reduced by rejusting the parameters that have a relationship with the switch-induced error voltage and the spike voltage.