| This paper is mainly about a part of research work on image and video signal processor based on mobile application processor. The third generation mobile communication technology has been moving towards maturity stage, while the fourth generation mobile communication technology is coming strongly today. Image and video processing has become an important part of mobile intelligent terminal. So C solution integrated image signal processing and video signal processing in high pixels has a great development in consumer electronics market. This paper mainly studies the video and image signal processing technology based on mobile intelligent terminal.On the base research of mobile intelligent terminal applications processor, an image and video signal processor architectures are designed for portable mobile intelligent terminal solution in this paper. Image signal processor, video signal processor, pipeline controller and data transmission control designed and integrated in the image and video signal processor system, which not only improves the chip integration level, but also reduces the power consumption and cost. The theoretical research and algorithm about image and video signal processing and high definition video decoding is developed in this paper. Some key technologies are studied in detail, including the image anti-vignetting algorithm, the adaptive automatic white balance technology, and AVS video compression algorithms all designed in Verilog HDL. In order to verify the image and video signal processor, the FPGA verification platform is set up with the CMOS image sensor OV5674 in the paper. As the test result, performance, power and cost can achieve the expected goal of the image and video signal processor designed in this paper,and the chip with image signal processing technology in the paper is taped out with 28 nm technical processing.The main works of the dissertation are as follows:1. An improved linear approximation algorithm has been proposed, in order to eliminate the image vignetting and color aberration caused by the lens. Firstly, a statistical method is adopted to obtain the image central point and the compensation factor curves of RGB three channels are carried out through the linear extraction. Secondly, each RGB channel’s attenuation speed is calculated. Finally, the original image is compensated using the obtained attenuation speed. By software simulation and FPGA verification, the image vignetting can be eliminated effectively and the non-uniform color caused by the lens can be improved significantly. Relative illumination of the image has increased 97.62%, while image vignetting phenomenon has disappeared. At the same time, relative color of the image has increased by 12.8% to 83.14%. Therefore the image color becomes more uniform and balance. The proposed novel linear approximation algorithm fulfills the requirement of practical applications, and improves image quality effectively.2. A high efficient pipelined architecture for the de-blocking filter in AVS is presented. The de-blocking filter stands in the fourth level in the video decoding pipeline, which filters the reconstructed pixels and sends filtered macro-block(MB) to the Reference Store. The novel pipeline architecture is to realize real-time AVS HD video decoding under smaller chip area size. The simulation results demostrate the de-blocking can support real-time de-blocking of 1080p(1920x1080)@30fps video easily.3. A novel reconstructed image padding algorithm is proposed for UMV during motion compensation in the AVS video decoding system. Applying this algorithm, outside reference macro blocks are reconstructed effectively in order. Experimental results show that the algorithm can improve an efficiency of motion compensation in a real-time AVS video coding system. In the mean time, a VLSI processor is also designed to correct logic functions and the silicon area of implementation is only added up to 1.5% after UMV is open.
|
PDF Full Text Request