Study On The Stability Model Of Amorphous In Ga ZnO Thin Film Transistors Under Gate Bias Stress

Amorphous In-Ga-Zn-O thin film transistors(a-IGZO TFT) have not only the advantages of high consistency like amorphous silicon TFT and high mobility like polysilicon TFT, but also high light transmittance and low processing temperature. These excellent characteristics make them being widely used in the Active Matrix Liquid Crystal Display(AMLCD), Active Organic Light Emitting diode Display(AMOLED), transparent and flexible Display devices. At the same time, a-IGZO TFT is also applied in radio frequency identification cards(RFID), wearable electronics, nonvolatile memory storage devices and sensors circuits due to their chip price.The traps in amorphous InGaZnO(a-IGZO) thin film can capture charges induced by the gate voltage, and consequently affect the electrical properties of the TFT. In this article, a technique for extracting the density of states in the linear region of a-IGZO TFT is proposed. The model exposed that the linear region mobility is in direct proportion to the ratio of the free charge to the total induced charge in the channel. And then the free carrier density and the trapped carrier density are separated. The Poisson’s equation and Gauss?s law are applied to the interface of the channel layer and the insulating layer considering non-uniform surface potential versus gate voltage relationship to obtain the relationship between the free carrier density and the surface potential, finally the value of trapped carrier density are produced. The density of states can be found by differentiating the trapped carrier density with respect to the surface potential in the linear region.The physical process of threshold voltage shift under PGBS(Positive Gate Bias Stress) of the a-IGZO TFT is intensively studied in this paper. The influences of defect on the electrical characteristics of the a-IGZO TFT under the effect of PGBS are simulated using the TCAD software. The results show that the shallow trap states can not only shift the threshold voltage(Vth), but also affect the mobility and the subthreshold swing of the device. On the other hand, the deep level states only lead to a Vth shift in the direction of positive gate voltage. Based on the process of the electrons in IGZO active layer tunnel into gate insulator and then one of the parts of the tunneled electrons have a certain opportunity to reverse tunneling, a model of Vth shift is established in a-IGZO TFT under PGBS. In the case of short stress time and small gate voltage, the electron tunneling length is short, the band bending of the gate insulator is small, and most of the electrons trapped into the gate insulator are located above the Fermi level, thus the tunneling back process happens easily. The influence of the gate voltage and stress time on the length of the electron tunneling is discussed, the electron distribution of the tunnel through the gate insulator is analyzed, and finally a threshold voltage shift model of a-IGZO TFTs under PGBS is established. The results are in good agreement with the experiment data.We also established a Vth shift model of a-IGZO TFT under NGBS(Negative Gate Bias Stress). Research shows that Vth shift of a-IGZO TFT with high concentration of oxygen vacancy under NGBS is mainly due to the emitting of the electrons in the donor-like states. As the NGBS imposing time increases, the number of emitted electrons at that moment reduces in a-IGZO films, but the total number of emitted electrons increases, which makes the threshold voltage continuely shift to the negative direction. The simulated curves of the Vth shift using our model are consistent with the experimental results. Comparing to the traditional semi-empirical exponential models, our model provides much more distinct and specific physical mechanisms for the negative Vth shift phenomenon under NGBS in a-IGZO TFTs.