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A Research On Memristor-based Self Tolerance Technologies

Posted on:2015-06-14Degree:DoctorType:Dissertation
Country:ChinaCandidate:D HuangFull Text:PDF
GTID:1108330479479624Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
Currently, conventional CMOS technology is approaching its scaling limit. With the development of new nano-devices the Moore’s Law can go on. Therefore, research on novel nano-devices has important significance to computer science. Memristor, with tremendous potential for numerous applications, is a passive non-linear resistance which can memorize the flow of charge through it. It is considered to be the fourth basic circuit element as well as a basis unit of Resistive RAM(Random Access Memory). Its reliability is one of the key areas which is worth to be studied. Because of the state logic operation of memristor, we designed the structure of Resistive RAM based on self fault tolerance of memristor by using the ability to integrate computation with memory. It provides a new way to improve the reliability of Resistive RAM based on memristor.Specifically, the main work and contributions of this dissertation are as follows:1. Modeling the resistive switching mechanism of memristor and proposing the method of fault testing based on memristorAnalysis of the resistive switching mechanism of memristor is finished in this dissertation and the boundary resistive switching mechanism and channel resistive switching mechanism are established as well as the corresponding circuit models. This dissertation analyzes fault of memristor and method of fault testing. Based on analysis of causes of fault in Resistive RAM, the definition and classification of memristor fault have been finished. On this basis, this dissertation proposes a fault detection method based on state logic operation of memristor. In this dissertation we analyze and model resistive switching mechanism of memristor from the circuit perspective different from the traditional physical analysis, which provides a theoretical foundation for the study of the memristor in the circuit level.2. Designing the self fault tolerance architecture based on memristor and proposing the self fault tolerance technologyThis dissertation proposes the self fault tolerance architecture based on memristor.Through the division of spatial area and the analysis of the time period the relationship between the various internal elements is studied in this dissertation. Theself fault tolerance technology is proposed. First we propose a set of state logical operations based on memristor:implication operation, NOT operation, AND operation, Copy operation and XOR operation. Based on these operations, we design the generating of horizontal and vertical parity code and Hamming code to realize the self fault tolerance technology. The results of simulation show that it can improve reliability of Resistive RAM effectively. In this dissertation we propose the self fault tolerance technology by using the ability to integrate computation with memory.3. Analyzing the designing of file system based on self fault tolerance structure and Proposing the self key-comparison algorithm based on the analysis aboveThis dissertation studies file system of Resistive RAM based on memristor. Firstly,the characteristics of Disk-based file system and Flash-based file system are analyzed. Analysis of the strengths and weaknesses of applying those file system to Resistive RAM is finished in this dissertation. Secondly, the data structure, reading and writing strategies, garbage collection strategies And other aspects of the policy of the Resistive RAM file system are studied to show principles and designing ideas of this file system. This work provides a theoretical basis for research of the Resistive RAM file system. Finally, this dissertation presents the self key-comparison algorithm based on the analysis above, which can achieve the most common lookup operation in the file system. It improves speed of file reading and writing and speeds up the directory searches.In summary, this dissertation primarily uses the state logic operation of memristor to design the self fault tolerance architecture based on memristor and propose the self fault tolerance technology as well as related optimization techniques. Its effectiveness and practicality is verified in this dissertation.
Keywords/Search Tags:Memristor, Resistive switching mechanism, Resistive RAM, Self fault tolerance, Architecture, Error checking and correcting, File system
PDF Full Text Request
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