Research On Multi-application High-performance Optical Interconnect Memory Access Architecture

With the increasing performance requirements for High Performance Computing(HPC)applications,the number of processing units integrated in a single chip multiprocessor(CMP)has increased as rapidly as memory access.Currently,most of the memory access architectures supporting HPC are based on electrical interconnects.However,electrical interconnect has poor parallelism and scalability,which hinders improvement of memory access.On-chip optical interconnect technology has the advantages of high parallelism and high energy-efficient,which is a promising solution to high-performance memory interconnect architectures.HPC applications can be categorized into high-serial applications and high-parallel applications according to application characteristics.Using appropriate CMP systems is a necessary means to improve application execution efficiency.High-serial applications will result in high-density remote memory accesses and serial data transmissions.At the same time,the variable flow characteristics impose higher requirements on the universality of the system.Therefore,homogeneous CMP with high serial computing capacity is more appropriate.In addition,high-parallel applications bring high parallel data traffic between the processing unit and the memory system.So,it is compatible to employ heterogeneous CMP with high parallel computing capacity.The focus of this paper is to design optical memory access architecture for different CMPs supporting the deployment of high-performance computing applications.The main research results of this paper are as follows:1.Traditional homogeneous CMP systems mostly adopt the interconnect architecture based on the processor-centric network with the limitation of local memory bandwidth,resource coordination,and remote access delay.This thesis proposes an optical interconnect memory-centric network architecture based on the computing-storage-integration.The MWMR optical interconnect architecture is used as the basic building block to coordinate the storage resources into a unified one.By configuring the wavelength resources accurately,the computing unit can use the storage resources flexibly.Otherwise,a token-based global arbitration scheme was introduced to avoid memory access competition.The simulation results show that the performance of this architecture is much better than that of the electrical interconnect memory-centric network in the uniform traffic and hotspot traffic modes.In the local traffic mode,the saturation throughput of the architecture is close to 100%.2.In the heterogeneous CMP system,mismatched memory bandwidth of GPU computing nodes and CPU computing nodes causes high congestion in the memory system restricting the total performance.In this thesis,according to the different requirements,low access latency for CPU computing nodes and high parallelism for GPU computing nodes,an optical interconnect memory architecture with the mixed read and write mode is proposed.Aimed at different requirements,the particular optical interconnect read-write mode reduces mutual interference.At last but not least,this paper discusses the methods of expending the proposed architecture in terms of wavelength resources and waveguide resources.In some ways,it verifies the high scalability of the proposed architecture.Simulation results show that the proposed architecture has better performance of latency and throughput in high parallel traffic mode.