Reconfigurable Application Specific Processor Cycle-accurate Model Based On SystemC

With the development of integrated circuits,the complex system on chip design requires the higher automation,the design of system on chip is becoming more and more complicated.But the traditional methods of SoC design,from system design to hardware design,and software design,using different design languages,so they unable to realize the hardware and software co-verification,the design cycle is so long that they can not meet the needs of the market.In this circumstances,a system modeling language SystemC solves the problem above.SystemC,which combines the advantages of the two aspects of modeling mechanism of object oriented programming and hardware,have the ability of modeling at different levels on the stage.In this paper,the SystemC language is used for cycle-accurate modeling for the Reconfigurable Application Specific Processor(RASP).Based on the hardware architecture of RASP,using the modular design,top-down design ideas,from the whole to the local,the layers of refinement,we realized the whole design of the RASP modular core cycle accurate model.This model adopts the SystemC transaction level modeling,separating from the RASP module operation function and communication function,and the communication architecture is modeled into a channel,presenting the SystemC interface class to other module.The communication between modules through the interface function achieves by calling,reducing the processing events and information.The main contributions of this paper:1.This paper achieves cycle-accurate model for the Reconfigurable Application Specific Processor.This model provides an early verification platform for the software development.2.The model has the same computation accuracy compared with the hardware in algorithm,but it is more than hundreds of times in simulation speed compared with VCS verification platform.