Function Improvement And EJTAG Design Of Reconfigurable Processor

With the rapid development of integrated circuit technology, the scale of the IC is more and more big, and the debugging of IC has become increasingly complex and important.The debugging methodology of IC has developed for more than 20 years, and occupied a decisive position of in the field of IC design. According to the different application scenarios, debugging methodology can be divided into several different species, including software simulation debugging, In-Circuit Emulation debugging and on-chip debugging method. With the increasing clock frequency of system on chip, the structure becomes more complex, and the rapid development of multi-core technology, the development of debugging methodology is facing major challenges and broad space for development at the same time.This paper introduces a reconfigurable application specific processor(RASP) which achieves the hardware acceleration of the specific algorithm through the coarse-grained static configuration mode to change the topology structure and interconnection of the basic compute unit. The design of EJTAG on-chip debugging function which based on RASP include two module, called EJTAG interface module and embedded debugging module. The data and instruction is serial input or output though the EJTAG interface, the embedded debugging module analysis the instruction to realize hardware breakpoints and memory read or write operation. In addition, according to the defects of some function of RASP, the paper introduces the corresponding improvements, and experimental verification.The main contribution of this paper are as follows:1. Design an embedded EJTAG debug module in the reconfigurable processor, and taped out in TMSC 40nm process, the test functions meet the design requirements;2. some optimization for the existing version of the reconfigurable processor also increased its performance. Firstly, change the way of fetching instruction to increase the efficiency when RASP work as the main equipment; secondly, adding an operational exception interrupt signal and improving the error detection efficiency; Finally, design a direct mode, in order to detect the correctness of DMA channel.