Design And Implementation Of Fpga Development Board Served For NoC Multi-core Processor

Multi-core processor chip consists of multiple processor cores within the same chip. As a result, the communication mechanism between the processor cores is directly related to the performance of chip multi-processor. It means that efficient communication mechanism is an essential part for high-performance chip multi-processor. Therefore, the key to design chip multi-processor focus on chip-interconnect structure. The NoC (Network-on-Chip) architecture which is based on routing and packet switch technology is good solution to the problem of communication between the processor cores.With the increasing size and complexity of NoC-based multi-core processor hardware design, and increasing demanding of peripheral interfaces, validation and verification plays an increasingly important role in the whole chip design flow. On one hand, because of its speed, directly connected with the actual hardware environment and low cost, compared to the merits of the hardware emulator and tape out, FPGA-based prototype validation turns into one of the main verification techniques. On the other hand, the hardware resources of single FGPA chip can not meet the demands of NoC multi-core processor prototype chip, self-designed by the group of the paper author joined in. Therefore, on the basis of the analysis of multi-FPGA network architecture, combined with the specific needs of the project and considered variety of factors, the paper propoed a solution of multiple FPGA interconnect network architecture, which is suitable for NoC multi-core processor prototype chip just mentioned. Finally, the paper completed the design of the development board based on the NoC multi-core FPGA prototype processors. The development board with four FPGA chips as the core, with a rich application and verification interfaces, can provide more than enough hardware resources for FPGA hardware design team to verify and implement the design of NoC-based multi-core processor prototype chip.Finally, the paper describes a hierarchical heterogeneous multi-core NoC processor prototype chip self-designed by the team author stayed in. Firstly, the paper introduced the chip hardware architecture and its characteristics, emphasizing the key computing components--omputing cluster architecture; then elaborated the parallel system software program and its advantages; last but not least, the paper showed the system performance parameters. At the same time, the paper builded a actual prototype demonstration system to prove the usefulness of the system. The overall system integrated into the PCB-board designed by the author and its team. The four FPGA chips receive and process the various algorithms data, and finally output.As a result, it is well proved that the development platform designed by this article is feasible in the specific application.