The Design Of Emulator For Embedded Multi-core Processor

With the development of embedded systems and its growing of complexity, debugging of the system is becoming increasingly important. As the emergencing of embedded multi-core processors, debugging tools and methods face greater challenges. To debug multi-core processors efficiently, there are two promising techniques. First, the JTAG debug technology which is widely used in single-core processor debugging. Another is the non-invasive real-time tracing debugging rechnology which is emergencing these days.Based on YHFT-QDSP debug system design with real-time on-chip tracing debug functionality and is compatible with mainstream JTAG debug emulator. Functionally, the designed QDSP emulator can both achieve the single-core debugging and the real-time on-chip trace debugging effectively. In the hardware design, the QDSP emulator is composed of the two debug channels: JTAG debug and trace debug channel. The JTAG debug channel, with single multi-core processor JTAG debug technology can achieve single step, breakpoints and other debugging functions. The trace debug channel sent input data with chip time stamp to the SDRAM memory which is a buffer for trace data. And then the data were sent to the PC host, to achieve a real-time , non-invasive debugging.