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The Architecture And Implementation Of Arithmetic Clusters Based On Stream Applications

Posted on:2007-06-17Degree:MasterType:Thesis
Country:ChinaCandidate:L LuoFull Text:PDF
GTID:2178360215970319Subject:Software engineering
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The main goal of this paper is to discuss the organization and implementation of thearithmetic clusters based on stream applications, which can support media applications with higharithmetic capacity tailored to the demands of an intensive data processing. The arithmeticclusters have complex design and magnitude size, restricting high-powered processor to gethigher performance, lower power consumption and delay.The paper chooses the stream architecture as a reference, presents SIMD arithmetic clustersto execute the same instructions. The kernel-level instructions are scheduled and assembled intoVLIW instructions when they are compiled. Then VLIW instructions are broadcasted to andexecuted in the four arithmetic clusters. Each arithmetic cluster contains some functional units isperformed by reading a stream from the SRFs. The COMM unit is used to exchange databetween the clusters when kernels are not completely data parallel.The design flow of the arithmetic clusters includes the functionality organization, the logicdesign and verification methodologies. Following the steps, we emphasis on the details of thearithmetic clusters design. The paper introduces some implementation technologies about thearithmetic clusters based on the stream architecture, improves the resource utilization throughcommunication scheduling. The JB/VAL unit is used in coordination with the SP and COMMunits to execute the conditional streams. Floating-point unit is an important part in the design ofall kinds of processors and it determines the performance of the processor.The arithmetic cluster in X processor is programmed in Verilog at RTL level, performedtesting of module, pipeline and system on the ModelSim SE 5.7d and nc_verilog tools. Furtherensure the correctness of design and completion of instructions. At the end of thesis, someschemes are offered aiming to amend the shortcomings of the stream architecture.The microcontroller(UC) and arithmetic clusters work together to organize the kernel-levelprocessor .The UC provides storage and issue of the VLIW instructions to the arithmetic clustersto accomplish the correct functions. Arithmetic clusters are the main executive mechanism,which can be scaled according to the applications needs and the capacities of transistors.
Keywords/Search Tags:arithmetic clusters, stream Architecture, floating-point unit, floating-point multiply-add, the design optimization of the floating-point division, verification and test, simulation and emulation
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