The Research And Implement Of The High Performance Floating-Point Multiply, Add Unit

Floating-Point Multiply and Floating-Point Add unit are parts of the heart of computing components in high-performance microprocessors, and the speed has great effects on the performance of the entire microprocessor. Researches on the high-performance Floating-Point Multiplier and Adder are of important practical significance and value in a wide range of applications.In this paper, we have made some research and optimization on the Floating -Point Multiplier and Adder of the X processor, which is part of the major national project "High-Performance Processor". The achievements will be directly applied to the project.The main research is as follows.1. Researches on the high-performance Floating-Point Multiplier and Adder, and their key technologies. Based on this we designed and implemented high-performance Floating-Point Multiplier and Adder to the X processor.2. We have designed the Leading Zero Detection (LZD) circuit in suit of the X processor. The circuit can not only detect Leading Zero, but also pre-calculate the normalized shift amount of bytes, making LZD and standardized coarse-grained byte-shifting operation perform parallel, further reducing the length of the critical path.3. We have optimized the Floating-Point Adder, applying the technology of rounding combination to the single data access structure of the Adder in X processor, so as to advance the operation running parallel with the main adder operation. This article has put forward a complete design blue print.4. The entire design is tested through a variety of inputs, including IEEE CC754 standard test vectors, marginal numbers and random numbers, which guarantee that the design is correct.Finally, we synthesized and optimized the Floating-Point Multiplier and Adder. The Floating-Point Multiply and Floating-Point Add components were divided into 5 and 4 pipelines individually .In a 0.13μm CMOS process, the results of logic synthesis show that the frequency of the Floating-Point Multiplier and Floating-Point Adder can all reach 700 MHz, which meets the requirements of the X processor.