Research And Implementation Of Electronic Nose Pattern Recognition Engine Accelerator Based On FPGA

The electronic nose(e-nose)system is a device that uses a sensor array to identify gases,consisting of a sensor array,a pattern recognition engine and peripheral circuit interfaces.The low power consumption,miniaturization and high-speed response of the pattern recognition engine are important for the application of e-nose system.Several researchers have applied deep learning to e-noses’ pattern recognition engines and achieved high recognition rates.However,neural networks with high recognition rates usually have complicated structures and a huge number of parameters,which bring additional power consumption and delay to the system,seriously hindering the deployment of e-nose on end-side devices.This article takes the design an e-nose system with more low power consumption,low latency,and high integration as the research goal,and by designing an e-nose pattern recognition engine with high hardware friendliness,and simplifying its structure and quantifying its parameters,it makes it have high hardware friendliness.In addition,this article designs a pattern recognition engine hardware gas accelerator based on FPGA devices,and completes its deployment and application in edge devices.The work in this article includes the following:(1)In this article,by building a gas data acquisition platform,gas data acquisition in ten categories is completed,which lays the foundation for the design of pattern recognition engine for e-nose.(2)In this article,using convolutional neural network as the core architecture,the pattern recognition engine for e-nose system is designed and is able to accomplish the classification task of ten types of gases with high inference accuracy.(3)A hybrid precision quantization strategy is proposed in this article to complete the parameter quantization of the pattern recognition engine,while the structure optimization of the pattern recognition engine is completed by using the jump connection fusion method.The parameter quantization and structure optimization enable the pattern recognition engine to have a high hardware friendliness,and the optimized pattern recognition engine can accomplish the gas classification task with 99.23% inference accuracy.(4)This article designs a hardware accelerator for a pattern recognition engine based on FPGA and implements the accelerated reasoning calculation of the e-nose pattern recognition engine in FPGA.Compared to high-performance general-purpose processors(Intel I7-12700K),the FPGA based pattern recognition engine hardware accelerator has38 times the acceleration effect,while consuming only 2.27% of the power consumption of I7-12700 K.The work in this article can provide a new way of thinking for the deployment and application of e-noses in low-power and low-latency scenarios.