| As a kind of non-destructive detection instrument widely used in the field of geophysics,ground-penetrating radar has been widely used in the field of archaeology,coal mine detection,road inspection and so on.As a type of ground-penetrating radar,borehole radar also conforms to the basic principle of ground-penetrating radar.When facing different application scenarios,it needs to have different requirements on antenna,transmitting system and acquisition system.In order to flexibly adapt to various application scenarios,the advantages and disadvantages of various sampling methods are analyzed through research.To address the above issues,a general design scheme of an acquisition system with two acquisition methods and the specific implementation process of this scheme are proposed.The transmitter source system for borehole radar is generally a Gaussian pulse signal.The broad spectrum nature of Gaussian pulses is such that as much stratigraphic information as possible can be obtained.Therefore,wide frequency band and high sampling rate are required for the acquisition system.At the same time,the higher the operating frequency of the ground-penetrating radar system,the vertical resolution of the whole system will be improved,but detection depth will be reduced.Considering the relationship between vertical resolution and detection depth,the acquisition system has different requirements for different application scenarios.Therefore,based on the above analysis,the two acquisition modes of real-time acquisition and random equivalent acquisition are selected,and the acquisition mode can be switched according to the demand.Therefore,this design is based on these two acquisition modes to carry out the design of the system hardware circuit,taking into account the requirements of real-time acquisition on the sampling rate,so the GSPS high-speed ADC is selected,and a special clock chip to generate the sampling clock,synchronization clock and FPGA device clock.The design uses the JESD204 B high-speed transmission protocol for real-time and equivalent acquisition,with a line speed of 6.5 Gbps.The FPGA not only completes the design of the JESD204 B receiver module,but also completes the implementation of waveform data unmapping,two acquisition methods,waveform data reconstruction,data packaging,data communication and other functions.The acquisition system is generally triggered before the acquisition is started.According to the common triggering modes of the acquisition system,two triggering modes are also selected in this design,and the triggering mode is switched by the instructions of the host computer.The chip selection is made according to the above requirements,and the specific power supply design,peripheral circuit settings,and internal logic implementation of FPGA required for the two acquisition modes are completed according to the selection.Finally,closed-loop and open-loop experiments were conducted to test the communication and acquisition of the entire multi-mode high-speed acquisition.After several experiments,it was found that the multi-mode acquisition system met the design requirements,and the overall performance of the acquisition performance was good,with communication modules,detection modules,etc.work normally. |