Design Of Low-Voltage And High-Efficiency Buck Converter Based On Current-Mode Control

The development of new energy vehicles,big data,5G networks and artificial intelligence has brought more and more prospects for chips,and power management chips,as the heart of energy supply for electronic products,also ushered in a larger market size.The DC-DC converter chip has the advantages of integrated,small volume,high efficiency,stable output voltage,and strong load capacity.Among them,the Buck converter is one of the most widely used power management chips.The development of portable equipment also has high efficiency and miniaturization of power management chips.This thesis presents the design of a high-frequency buck converter for low supply voltage applications,focusing on a low-voltage bandgap reference,on-chip clock generation circuit,and a phase-locked loop circuit.In order to maintain the conversion efficiency at high switching frequencies,an adjustable drive circuit and an adaptive deadtime circuit are designed.In order to achieve a low temperature coefficient reference at low supply voltages,a single transistor feedback reference architecture combined with a low threshold N-type pass transistor enables a stable reference output with high power supply rejection ratio(PSR)at 2V.The bandgap reference designed in this thesis has a start-up flag signal.When the output reaches the expected voltage,the flag signal flips,so that other modules in the chip can ensure the correct timing of the power-on reset.The operating frequency of the Buck converter designed in this article can be configured with external resistor.In order to improve reliability,design upper and lower resistor limit circuits to limit the frequency range and avoid open and short circuit faults of the configuration pin.In order to avoid beat frequency interference in complex electronic systems,the operating frequency of the buck converter designed in this thesis can be synchronized with the external frequency signal,so that the frequency synchronization function can be realized.Aiming at the portable device usage scenario used by the Buck converter designed in this thesis,the drive circuit with different driving capabilities and the adjustable dead time adjustment circuit are comprehensively adopted to improve the conversion efficiency.In the design of the drive circuit,it is necessary to design a compromise between the driving ability and the ground bounce interference,so this thesis designs a three-state drive unit,which can control the driving ability of the drive unit to the power tube through logic signals.In addition,the dead time is optimized to reduce the body diode reverse recovery loss of the low-side LDMOS,and control the dead time to the shortest time,thereby improving the conversion efficiency and reducing the EMI of the chip.Based on 0.13μm BCD process,this thesis designs and implements a high-frequency,low-voltage,high-current Buck converter chip suitable for portable equipment,with input voltage of 2.25V-5.5V,output voltage of as low as 0.5V,output current of 6A,and switching frequency of up to 10 MHz.The simulation results show that the peak conversion efficiency can reach 93% at a switching frequency of 6MHz.