| The presented technology utilizes most suitable control schemes according todifferent power losses, thus satisfy the load variety requirement. It is important inmany applications including those that are battery powered and has energyconsumption constrains. The simulation result shows that the circuit design is feasible,and the efficiency especially at light load is improved notablely.DC-DC converter chip in the mobile electronic products have been widely used.As for severely limited energy and equipment available space, designers’ primarygoal is to achieve smaller chip area, higher conversion efficiency and longer batterylife by the simplest technology.A DC-DC Buck converter IC design with auto mode-hop technology is discussed.PWM hard switching mode is employed when the output load current is Greater than250mA; soft-switching hysteretic PFM mode is utilized when the output current varyfrom100mA to250mA; if the output current is less than100mA, constant on-timemode with self-adapted reduced gate drive voltage works. This thesis firstly analyzedthe main causes of losses in each stage, studied several appropriate control technology,and deduce the formula of efficiency node between different technologies. Thenrealize MOS transistor level circuit of the operational amplifiers, comparators,bandgap reference voltage source, hysteresis voltage generator, logic control module,etc. Finally, finish the layout design, test and debug by Cadence IC tool inaccordance with specification and design rules.With CSMC mixed-signal0.5um CMOS technology, simulation and test resultsshow that the circuit can fulfill a smooth transition between three modes, the load andline regulation is good and a high efficiency in range of full load is achieved. |
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