Design Of APD Interface Circuit With Breakdown Protection Function

When working in high gain Geiger mode,APD has the advantages of fast response,strong antiinterference ability and excellent single photon detection ability.Therefore,it has been widely used in weak light detection fields such as lidar and quantum communication.In the ROIC working with the detector,the interface circuit provides appropriate working conditions for APD and plays a key role in connecting the detector with the subsequent signal processing circuit.The optimal design of the interface circuit is conducive to the improvement of the detection performance of the whole system.In the field of single photon detection and imaging,in order to obtain higher resolution and faster scanning detection speed,the detector is developing towards large-scale array and high integration.Due to the discreteness of manufacturing process,the correlation performance of each pixel detector of array APD under unified bias voltage will be different,resulting in the non-uniformity of array circuit and even reliability problems.Aiming at the problems related to the application of domestic In Ga As/In P-APD in large array,the structure and parameters of quenching circuit are designed and optimized on the basis of theoretical analysis,so as to eliminate the influence of detector nonuniformity on circuit performance degradation in a certain range.Morever,a hold-off time adjustment module which can flexibly adjust the detector hold-off time according to the 6-bit serial input adjustment code and counting clock cycle is designed.The module can reduce the false count caused by the afterpulse effect according to the detector performance or application requirements and on the premise of ensuring a certain detection efficiency.In addition,the designed within-pixel APD breakdown protection circuit will not affect the system function when the detector is normal.When the detector is damaged by high voltage breakdown due to characteristic degradation,it can effectively protect the internal circuit from being damaged by high voltage or large current input from the outside,and timely disconnect the damaged detector from the circuit through the fusing of the fuse,so as to avoid the problem of system failure caused by the damage of some detectors in the large array,and improve the reliability of the array.According to application requirements,this paper completes the simulation optimization and layout design of interface circuits under the process conditions of the TSMC 0.35μm CMOS process and 0.18μm CMOS process.In order to further compare and verify the function of the protection circuit,two versions of protection circuits with different schemes are designed under the above two process conditions.According to the simulation results of the Cadence,the relevant performance of the designed circuit can meet the index requirements.Under TSMC 0.35μm CMOS process,the test results show that the maximum and minimum hold-off time of the chip is respectively about 1.2935μs and21.45 ns when the input counting clock frequency is 50 MHz,the adjustment resolution is 20 ns,and the adjustment dynamic range is about 35.6d B.Moreover,the quenching time of the chip is about3.31 ns and the reset time is less than 4.72 ns.In addition,the breakdown protection voltage of the protection circuit module can reach 75 V,the maximum breakdown protection current is about13.9m A,and the maximum output clamping voltage is about 5.68 V.The interface circuit with holdoff time regulation and breakdown protection designed in this paper has been successfully applied in the array system.