Design And Study Of Lateral Multi-Charged Layer SACM Avalanche Photodiode

Photoelectric detection is the core technology of optical communications,optical storage,and optical detection.With the development of communication technologies,people are gradually pursuing detectors capable of detecting weak light at the photon level.The single photon detection technology has emerged as a result and has occupied an important position in the fields of national defense security,social economy and industrial production,and has become a studied hot topics.In many single-photon detectors,single-photon avalanche detectors fabricated using avalanche photo diodes have advantages such as high internal gain,low noise,high sensitivity,compatibility with existing CMOS processes,and high integration,becoming single-photon detection.The mainstream.In this paper,a Separate Absorption Charge Multiplication Avalanche Photo Detector with a lateral structure and multiple charge layers is designed based on a SOI CMOS process.The SACM structure separated from the absorption region and the multiplication region is used.Therefore,only the electrons in the absorption region can reach the doubling region and undergo impact ionization,A single type of carrier avalanche is achieved,reducing avalanche noise.A stepped doped charge layer is added between the absorption region and the multiplication region,thereby improving the electric field in the absorption region and the multiplication region,increasing the carrier drift velocity,increasing the frequency response,and effectively solving the avalanche voltage and frequency response.contradiction.The lateral structure can ignore the curvature effect and can effectively solve the contradiction between responsiveness and frequency response.The Silvaco ATLAS simulator was used to simulate the I-V characteristics and frequency response of the designed device.The avalanche voltage of the device is 8.2V.Under a light with a wavelength of 400nm and a light intensity of 0.001W/cm2,the response of the device can reach 160.4A/W when the reverse bias voltage is 8.2V.Under the bias voltage,the cut-off frequency of the device can reach 10GHz.Silvaco ATHENA simulator was used to perform process simulation on the designed device,and a more reasonable and effective process step was obtained.The IV characteristics of the device were simulated using an ATLAS simulator.The resulting device avalanche voltage had a deviation of 1V from the designed avalanche voltage.Finally,an active quenching circuit and reading circuit were designed and the layout design was completed.The dead time of the circuit is 7ns and the maximum photon counting rate is about 150 Mcps.