Electronic Science And Technology SiC Neutron Detector Frontend Readout Circuit SET Reinforcement Design

Compared with traditional semiconductor materials,silicon carbide(SiC)is more resistant to radiation and high temperature.Therefore,SiC neutron detectors have broad application prospects in space physics,aerospace,nuclear detection and many other fields.The front-end readout chip,as the signal processing circuit of the detector,is extremely sensitive to the radiation effects in its working environment.As circuit integration continues to increase and device size continues to decrease,the impact of single event effects(SEE)on integrated circuits becomes increasingly severe,among which single event transients(SET)are the main form of analog circuit SEE.This paper investigates the SET effect of the analog front-end readout circuit of SiC neutron detectors and reinforces it.The main work and innovations of this article include:Firstly,an analog front-end readout circuit was designed based on a planar SiC neutron detector,which achieved the conversion of neutron energy information to voltage peaks,and sampled,maintained,and readout the voltage peaks.A single energy readout channel includes a preamplifier,leakage current compensation circuit,pole zero cancellation circuit,shaping filter,holding circuit,and time marking circuit composed of discriminator and logic extender.Emphasis was placed on analyzing and modeling the noise performance of the overall circuit.By analyzing relevant parameters,noise optimization design was carried out for the preamplifier and shaping filter.At the same time,noise,ballistic loss,and readout speed were integrated to select the shaping time.Afterwards,the entire circuit design was completed.A circuit layout was designed based on DB 0.18μm process and post simulation verification was conducted to verify the circuit functionality.The layout size was 1423μm×1013μm,the post simulation results show that the forming time is 25ns,the“Time Walk”deviation is 12ns,the nonlinearity error is less than 2.5%,the circuit gain is 14.2 mV/fC,and the ENC is 76.1e~-.Secondly,by simulating and analyzing the SET response of the front-end readout circuit,all nodes that require SET reinforcement design were identified.On the basis of studying and analyzing the mechanism of SET effect,a circuit level SET dual exponential current source simulation model was constructed.Based on this model,the SET response of the linear part(operational amplifier circuit),semi linear part(switch capacitor structure),and nonlinear part(logic circuit)of the circuit was simulated and analyzed,and all sensitive nodes in the circuit that require SET reinforcement were obtained.Finally,SET reinforcement design and simulation verification were carried out on the front-end readout circuit.Corresponding reinforcement strategies have been proposed for different circuit modules.Among them,the core operational amplifier of the preamplifier and the inverter in the logic circuit used node splitting method for SET reinforcement design.Through simulation verification,the circuit’s resistance to SET effect was enhanced;The switch capacitor structure in the sampling and holding circuit is reinforced by node splitting and changing the working state of the tubes,with significant reinforcement effects;The discriminator output can completely mask the transient flip caused by SET through a logic extender;This article proposes a new circuit reinforcement method for NAND gates,which weakens the SET response of the circuit by more than half.