Design Of Adaptive Equalization Circuit For 8K Ultra HD Display Driver

In recent years,8K Ultra High Definition TVs have appeared on the consumer market and have gradually become the mainstream of the market.The resolution of 8K ultra-high-definition TV has been increased to 4 times that of 4K TV,and the refresh rate is generally 120Hz,which is doubled.This makes the realization of 8K ultra-highdefinition TV bring some challenges related to driving technology.One of them is the high insertion loss caused by the long signal line of the large panel size.The channel insertion loss may cause the eye diagram of the input signal at the farthest receiving end to be completely closed,so it needs to be solved by adding an equalization circuit at the receiving end.This paper designs a receiving end circuit of adaptive equalization technology applied to display drivers.After analyzing and comparing the current equalization circuit and adaptive equalization structure,it is based on the characteristics of short transmission channel,low loss,and fixed rate of 8K UHD TV,Adopted an adaptive equalization structure for low-frequency compensation of the transmission channel.Different from the traditional adaptive equalization structure that adjusts the highfrequency gain,this article mainly studies the equalization structure that adjusts the low-frequency gain.It uses a continuous-time linear equalization(CTLE)structure.Compared with the traditional structure,this structure increases the equalization range and reduces the circuit complexity and power consumption.The equalization filter mainly adjusts the low frequency gain,and the adaptive loop adopts a single loop.The system is mainly composed of an equalization filter,a limiting amplifier(LA),an adaptive control loop and an output buffer.After the signal is equalized,it is connected to the clock data recovery(CDR)circuit for further shaping.The design of this article uses 0.18μm CMOS process to complete the design of the 4Gbps CTLE adaptive equalization circuit.This structure achieves equalization by adjusting the low-frequency gain of the equalization filter.The power supply voltage is 1.8V,and the equalized channel loss is 4dB-22dB.Compared with the traditional adaptive equalization circuit,the equalization range is increased.Three different process corners are used,the signal jitter is 0.23UI,the maximum signal output swing is 0.45V,the minimum is 0.28V,and the power consumption of the core is 5.004mW,which greatly reduces power consumption.The core part the area is 87μm× 125μm,which reduces the area.This structure can realize the function of adaptive equalization and meet the design requirements.