Thermal Stress Analysis And Structural Optimization Of 3D IC

Compared with the two-dimensional packaging,3D IC(3D Integrated Circuit)technology has the characteristics of shorter interconnection length,better heterogeneous integration,lower power consumption and smaller package size,so it has been widely used.However,because3 D IC integrates several components with different sizes,and the working power is significantly increased,it is easy to generate hot spots,which brings a significant challenge to the reliability of the 3D IC.Therefore,the reliability of 3D IC has become an urgent issue in the field of thermal management of electronic packaging.In this paper,combined with electronic packaging,micro-channel heat sink and all-copper interconnection technology,a 3D IC model with hot spot was established.The overall performance of the 3D IC was evaluated according to the heat transfer efficiency and thermalmechanical behavior,and the geometric structure was further optimized.The following aspects were carried out in this work:1.The finite element model of the micropin fin heat sink,which will be used in the 3D IC device,was established,and the influences of the geometric parameters of the micropin fin on the heat transfer were studied.Furthermore,the spacing and height of the micropin fin were optimized to minimize the temperature and pressure drop,and the optimal structure of the micropin fin was obtained.2.Based on the optimizated paremeters of the micropin fin,a full model of the 3D IC and a substructure model including the TSV(Through Silicon Vias)structure were established.The thermomechanical behaviors of the TSV structure under cyclic temperature load(extreme condtion)were studied using finite element analyses.The results show that within the scope of elastic deformation,the maximum Mises stress of the TSV structure is located at the edge of the interface between TSV＿Cu and memory,where the deformation is dominated by shearing.Furthermore,the TSV structure was optimized to reduce the stress at the dangerous point as well as to improve the electrical conductivity of the TSV＿Cu.Compared with the original design,the maximum normal stress and shear stress on the TSV＿Cu/memory interface of the optimized TSV structure can be reduced by 86.4% and 29.4%,respectively.The thermal mechanical behavior of the optimized TSV structure was further analysed with considering the plastic deformation of the TSV＿Cu.It is found that the average plastic work density in the zone near the edge of the TSV＿Cu/memory interface(the dangerous zone)approaches zero after seven thermal cycles,which indicates that the optimized structure could avoid thermal fatigue failure effectively.3.Based on the optimized microchannel and TSV structure,the thermomechanical performance of the all-copper interconnect area under cyclic thermal load was further studied.The influence of the copper pillar’s height on the thermomechnical reliability of the 3D IC was analyzed,and the optimal height was achieved.4.The full model of the 3D IC,which integrates the micro-channels,TSVs,and all-copper interconnects,was established based on the optimized structural parameters.The heat flow transfer and mechanical responses of the 3D IC under high-power load(working condition)were systematically studied through thermal-fluid-solid coupling analyses.The results show that,compared with the initial design,the optimized 3D IC can effectively reduce the maximum temperature in the zone near the hot spot and significantly reduce the thermal stress on the heterogeneous interfaces inside the 3D IC.