Research On Ω-gated Field-effect Transistors Based On MoS₂ Materials

The new two-dimensional semiconductor materials represented by molybdenum disulfide（Mo S₂）are single-atom layer crystals with high intrinsic mobility,atomic-level thickness,and no hanging bonds on the surface.The International Roadmap for Devices and Systems（IRDS）has pointed out that the development of transistors using ultra-thin 2D semiconductors can effectively suppress the tunneling channel current and off-state current between the source and drain in short-channel devices,which is expected to overcome the negative impact of the short-channel effect on transistor performance and become an important choice for achieving ultra-low power consumption.At the same time,reducing the transistor operating voltage is one of the main ways to reduce the power consumption of the integrated circuit.Reducing the transistor operating voltage can be achieved by enhancing the gate control capability.In order to enhance the capacity of grid control,the equivalent of the traditional grid medium thickness of oxide layer（EOT）is less than 1 nm,and gradually close to the physical limits.Due to the role of the quantum tunneling effect,the size of the device in the process of the proportional miniature is faced with the problem of stability and reliability.In addition,the gate structure of the transistor plays a decisive role in its performance,and another reason to promote the continuous improvement of transistor performance is the improvement of the gate structure.The transition from the planar gate structure to the non-planar gate structure can obtain a larger gate control area,so as to achieve stronger electric field modulation capability.Therefore,there is a need to promote the development of new semiconductor devices for future advanced electronic circuits in terms of the design of gate structures.Based on this,this thesis designed a kind ofΩ-type structure of a two-dimensional field-effect transistor,achieving an enhanced local electric field.At the same time,the nanowires were used as the template of the non-planar gate,and the molybdenum disulfide channel layer was physically transferred to avoid the difficult problem of directly depositing functional materials on the two-dimensional semiconductor surface.Based on the locally enhanced control capability of the surrounding gate structure,the performance of the device exceeds that of silicon-based devices of the same size.The device has excellent electrical performance at room temperature,with a switching ratio of channel current up to 10⁸ and a sub-threshold swing of 76 m V/decade.By series work in saturated state constructed transistor logic inverter,the inverter of voltage gain is 36,noise margin reached 87%.On the basis of the inverter circuit,NAND gate logic is realized by double gate control.Compared with the traditional Nand gate circuit,the number of devices is reduced,the integration efficiency is improved,and the production cost is reduced.The main innovations in this thesis are as follows:（1）The silver nanowire was placed on the silicon substrate as a buried gate to deposit the dielectric layer,and then the fixed point transfer of the mos2nanowire and the preparation of the source leakage electrode were carried out.The whole structure adopts a buried gate structure,the fabrication process is simple,and can avoid the damage to the transistor channel caused by deposition of the dielectric layer to the greatest extent.（2）The back gate and buried gate of the transistor are used for double gate control,and the channel area is maximized to achieve effective control of the threshold voltage and output characteristics of the transistor,and the logic gate circuit is based on a single discrete device is realized.