| With the function of modern electronic system gradually expanding and performance gradually improving,the complexity of the system is increasing.Computer technology,display technology,signal processing technology,microelectronic technology,the application of electronic technology has penetrated into every corner of the military and civilian fields,and advanced electronic systems have been introduced.Digital-to-analog converters(DACs)are used in the front-end and back-end of modern advanced electronic systems to take advantage of the superior performance of digital processing technology.As the speed and accuracy of the DAC constrain the performance of the entire electronic system,the demand for high-speed,high-precision,high-resolution,and low-power digital-to-analog converters is increasing.In recent years,the market of DAC has shown a trend of steady growth,and it has shown its important position in the fields of automobile,military,aviation,communication,medical treatment and so on.In this thesis a 12-bit voltage-current hybrid structure DAC is designed implemented0.13μm SiGe BiCMOS technology,which is applied to the temperature feedback control of the micro-ring modulator to keep micro-ring in the best working state.The DAC consists of a voltage-current hybrid architecture core circuit,a sample-and-hold circuit,a rail-to-rail operational amplifier,and a low-voltage linear regulator.Among them,the core circuit of the voltage-current hybrid architecture realizes the conversion of 12-bit digital quantity to analog signals.After the time-sharing sample-and-hold circuit,it finally realizes four-channel0.3V~4.7V wide-range analog voltage output.In the design,by analyzing the systematic and random mismatch effects of the circuit in detail,the device sizes are rationally designed,and the random mismatch is verified by Monte Carlo.The layout is rationally planned,and the Sshaped layout or the common centroid structure is adopted to reduce the impact of the system mismatch.The layout size of the 12-bit voltage-current hybrid DAC designed in this thesis is 380μm×510μm.The post-simulation results show that the output range of the DAC proposed in this thesis is 0.3~4.7V,the output settling time is 7.38μs,the differential nonlinearity error is0.31 LSB,the integral nonlinearity error is 0.36 LSB,and the power consumption is 12.879 m W.The post-simulation results of each index meet the original design goals,and the performance is good. |