Research And FPGA Design On Digital Predistortion Technology Based On Generalized Memory Polynomial And Convolutional Neural Network

In this thesis,an in-depth study of digital pre-distortion technology is carried out for power amplifiers in resource-constrained real-time systems,aiming to further balance the relationship between algorithm complexity and performance and reduce resource consumption.Based on the convolutional neural network and the characteristics of the input function of the traditional pre-distortion model,a digital predistortion scheme of power amplifier based on generalized memory polynomial and convolutional neural network model is proposed.According to the proposed algorithm model,the corresponding FPGA implementation method is designed.The main work of this paper includes the following two aspects:1、A predistortion behavior model based on generalized memory polynomial and convolution neural network(GMP-CNN)is proposed.The basis function of the traditional GMP model is taken as the three-dimensional input of the proposed model,and the prior knowledge is introduced without reducing the description accuracy by constructing the solution method of the physical model.With the weight sharing feature of multi-channel convolutional filter layer,the model coefficients are greatly reduced while dimensionality is reduced.The experimental results show that compared with Deep Neural Network(DNN)and Augmented Real-Valued Time-Delay Neural Network(ARVTDNN)models based on fully connected neural network,the training period of GMP-CNN model is reduced by more than 80%85%,and the complexity of the model is reduced by more than 50%when the modeling performance and linearization performance are similar.Compared with the Real-Valued Tme-Delay Convolutional Neural Network(RVTDCNN)model based on convolutional neural network,the training period of GMP-CNN model is reduced by 80%,ACPR is reduced by about 1dBc and NMSE is reduced by about 0.7dB,which further balances the relationship between algorithm complexity and performance.2、According to the proposed GMP-CNN model and indirect learning architecture,a corresponding digital predistortion implementation method is designed.An optimized uniform piecewise linear function lookup table method is proposed,which reduces the storage space and improves the fitting accuracy,and the absolute error integral is reduced by 53.8%compared with the traditional uniform piecewise linear method.The experimental results show that the ACPR and NMSE of the predistorter based on THE GMP-CNN model reach-50.72dBc and-40.74dB during the hardware simulation,which verifies the feasibility and accuracy of FPGA design.In this thesis,the digital predistortion technology based on generalized memory polynomial and convolutional neural network and its FPGA design are studied,and the algorithm complexity is reduced while the performance is guaranteed,which makes the application of digital predistortion technology in real-time system with limited resources possible.