Research On The Application Of Low Density Parity Check Code In SC-FDE Systems

With the rapid development of channel coding and decoding technology in the field of communication,Low Density Parity Check code has been a crucial solution in the field of channel coding due to the advantages of low delay and low decoding complexity.This subject mainly focuses on the application of LDPC code in SC-FDE systems,and designs the matrix construction,coding and decoding schemes suitable for SC-FDE systems.According to the SC-FDE systems’ requirements for LDPC encoding and decoding schemes,on the one hand,the check matrix construction method for LDPC code in the SC-FDE systems is determined,which is the construction method of quasi-cyclic dual-diagonal check matrix.On this basis,the encoding algorithm of the LDPC code is designed,which is the fast encoding algorithm.In addition,simulation experiments are implemented and the results show that this construction method can obtain a better performance gain,compared with random construction method.On the other hand,this topic focuses on the decoding algorithm of LDPC code.Aiming at the two major steps in the VC-RBP algorithm which are the selection of unstable nodes and the calculation of information,the CORR-VC-RBP algorithm is proposed,which is suitable for the decoding of LPDC code in the SC-FDE systems.The CORR-VC-RBP algorithm uses the idea of relative residual degree and double decision to improve the accuracy of selecting unstable nodes.Different from the usual VC-RBP algorithm that uses the formula of the LLR-SPA algorithm to calculate node information,which requires a large number of exponential and logarithmic operations,the CORR-VC-RBP algorithm uses the max-log principle and the parity of the tanhx function to simplify the complexity of the node calculation formula,and at the same time uses the normalization factor to make up for the performance loss caused by the simplified formula.In addition,experiments are used to verify the decoding performance and convergence performance of the CORR-VC-RBP algorithm,and the results show that the CORR-VC-RBP algorithm has better decoding performance.And when the bit error rate is 10-6,the CORR-VC-RBP algorithm has achieved a performance gain of 0.266dB compared to the VC-RBP algorithm.In addition,the CRC-LLR-SPA algorithm is proposed on the basis of the existing LLR-SPA algorithm.The CRC-LLR-SPA algorithm combines the LLR-SPA algorithm with the CRC more quickly to determine the position of the error bit.The decoding performance of the CRC-LLR-SPA algorithm is demonstrated through experiments,and the results show that the CRC-LLR-SPA algorithm has a better performance improvement compared with the LLR-SPA algorithm.Finally,the SC-FDE system using the above LDPC code is designed and built.On this basis,system link-level simulation experiments are implemented to analyze the performance of the SC-FDE system designed in this paper,and compare it with the performance of SC-FDE system using Turbo code.The results show that the performance of SC-FDE using the above LDPC code is better than that of the system using Turbo code.In summary,the above coding and decoding schemes have good performance while maintaining good computational complexity,which has a certain role in the improvement of the reliability of the SC-FDE system.And it has certain benefits to the later hardware implementation.