Design And Implementation Of Zynq-7000-based Componentization Of Space And Terrestrial Integrated Network Identifier Mapping Function

In the current era of informatization and globalization,a global coverage,lowlatency communication,high-security and reliable information network has become an inevitable requirement for the construction of the next-generation network.Space and Terrestrial Integrated Network(STIN)architecture based on Identifier Mapping provides the advantages of autonomous control,on-demand services,and core network security for our country’s STIN construction.The design of separating user space and cyberspace through Identifier Mapping solves the traditional problems such as ambiguity,low reliability,and poor mobility in network protocols.At the same time,Identifier Mapping also puts forward higher requirements for the guarantee of system processing performance and low latency,and some scenarios in space-based satellite nodes that require low-power operation of the system cannot meet this requirement well.Zynq-7000 platform is a low-power system-on-chip that combines hard core resources and Field Programmable Gate Array(FPGA).This thesis proposes a componentized design and implementation of Identifier Mapping function of the STIN based on the Zynq-7000 platform.This design utilizes the performance advantages of FPGA to implement Identifier Mapping function in hardware,so as to provide lower processing power for space-based nodes;at the same time,it provides lower power consumption,better scalability for the system through componentized control based on Zynq-7000.The specific work of this thesis is as follows:Firstly,this thesis describes the current research status of the three aspects: the related protocols of the STIN,the network technology based on FPGA,the softwarehardware collaboration based on the Zynq-7000 platform.It also introduces the model of the STIN communication based on Identifier Mapping,the related principles of FPGA and Zynq-7000 platform,and the algorithm structures such as LRU,LFU and Bloom Filters.Secondly,on the basis of the above technologies and principles,this thesis analyses the feasibility and advantages of using Identifier Mapping in the implementation of FPGA,and designs and implements a mapping query algorithm suitable for FPGA.In order to preserve the system flexibility of the original software implementation and the full protocol stack content of IDSR,this thesis transplants embedded Linux based on the hard core resources of the Zynq-7000 platform;then,according to the connectivity characteristics of the software and hardware architecture of Zynq-7000 platform,the components of each module in the hardware are designed in different levels.The access and switch of all components are controlled by the upper layer of Linux in the platform.Finally,this thesis conducts functional verification and performance verification of the above design and implementation.The results show that the Zynq-7000 platform equipped with this design can provide both software and hardware for space-based nodes in low-power operation scenarios in STIN.At the same time,the functional test based on the Zynq-7000 platform verifies the component switching between the PL overall and the PS overall,the component control between different protocols in the PL,and the components with different functions or different algorithms in the same protocol;the results of the performance test verify that the FPGA-based Identifier Mapping implementation can significantly shorten the Identifier Mapping processing delay of space-based nodes.In the end,this thesis concludes with a summary of the full-text work,reflections on the insufficiency of the research process,and an outlook for future related research.