Research And Design Of High-precision Time Measurement Algorithm And Its IP Core

The fourth generation High Energy Photon Source(HEPS)is one of the major scientific and technological infrastructures in China.The under construction hard X-ray high-resolution spectroscopy line station of HEPS can provide a suitable experimental environment for nuclear resonance scattering experiment.As an important part of the nuclear resonance scattering experimental environment,the high-precision time measurement equipment serves as the task of recording the time structure of the sample nuclear scattering in the experiment.In order to be compatible with more samples and record more detailed time structure in nuclear resonance scattering experiments,high-precision time measurement algorithms are required to have a time resolution of less than 100ps.Therefore,it is of great significance to study the high-precision time measurement algorithm.Aiming at the requirements of time measurement algorithms in high-energy physics experiments,this thesis designs a prototype of high-precision Time-toDigital Converter(TDC)IP core in 180nm CMOS process.In order to avoid the problem that the resolution of the conventional delay chain method is limited by the time of the quantization unit and is susceptible to environmental factors,a time measurement algorithm based on the differential delay ring structure is designed in this thesis.The differential structure used in the algorithm offsets the influence of the external environment on the time resolution accuracy while achieving highprecision time measurement.In addition,the ring structure has a limited number of codes,which reduces the decoding pressure in the algorithm design.Based on the determined algorithm design,the specific work content is as follows.(1)According to the algorithm design,the time measurement IP core architecture is defined as six parts,including differential delay ring module,decoding module,counting module,phase-locked loop module,asynchronous storage module and transmission module.The differential delay ring module realizes the quantization of time,and the time interval is quantized into three counts.The decoding module and the counting module realize the analysis and calculation of quantitative data.The phase-locked loop module is responsible for generating the main clock of the system.The asynchronous storage module and the sending module realize the storage and transmission of test data.(2)According to the module definition,coding to realize the module function.In the process of module implementation,solutions are given to the existing problems in the structure.For example,a high-speed edge comparator is designed for fast signal comparison in the differential delay ring structure.Aiming at the misjudgment of the comparator in the ring,a correction structure based on the slow loop’s odd cycles is designed.Aiming at the decoding problem of different data structures of thermometer code,a general ring positioning method is designed to realize the fast positioning of thermometer code transition.The design of a phase detector and a parity counting selection structure for the small phase problem of the counting module.Asynchronous storage unit and transmission protocol are designed for data security transmission.(3)The IP core is implemented in the form of a chip to obtain the measured performance of the design.In the chip implementation process of IP core,constraints are given for its physical design,including the modular design of the comparator,the physical placement and path delay requirements of the differential delay ring structure,and the placement requirements of the phase-locked loop.(4)In this thesis,a test method of high-precision time measurement chip is developed based on Field Programmable Gate Array(FPGA).According to the test method,the test platform is built,including the design of chip test module,FPGA logic design and PC configuration software design.Finally,combined with the test method and test platform,the performance of the high-precision time measurement chip is tested and verified.The test results show that the high-precision time measurement IP core based on the differential delay ring structure has a time resolution of 17.8ps,a test accuracy of 9.4ps,and a measurement range of 33.5ns.In addition,the integral nonlinearity of the IP core is[-0.4,0.5]LSB,and the differential nonlinearity is[-0.9,0.4]LSB.