Reserch On Electronic Reconnaissance And Active Jamming Generation Technology Based On FPGA

With the development of modern military,electronic warfare has gradually become the main form of warfare in war.As an important military electronic equipment,radar plays an critical role in target detection and tracking,battlefield scene reconnaissance,and weapon guidance.Therefore,the pros and cons of onside in radar countermeasures are sometimes even directly related to the outcome of the war.Radar countermeasures include two important directions: electronic reconnaissance and radar jamming.The former is to obtain the parameters of the opponent’s radar(sunch as frequency,pulse repetition frequency),distance and azimuth position information etc.While the latter makes the enemy radar unable to work normally by active or passive means.At present,the electromagnetic environment is becoming more and more complex,and the novel radar and anti-jamming technology are developing rapidly.Extracting the key information of the enemy radar in the complex electromagnetic environment and effectively jamming the enemy radar has become a key concern of all parties.Because reconnaissance ans jamming usually faces high-speed signal processing,it has extremely high real-time processing requirements,and it is difficult to use digital signal processors(DSP)to meet real-time processing requirements.Application-specific integrated circuits(ASICs)are usually not used as core processors because of poor versatility,long development cycles and poor portability.Therefore,it is very important to realize the real-time processing of reconnaissance jamming under the low power consumption and general hardware platform.In view of the above problems,this paper studies the frequency domain reconnaissance processing algorithm and active interference generation technology which is suitable for real-time processing.On this basis,the field programmable gate array(FPGA)platform is used to design the real-time processing of reconnaissance and interference.The specific work content is as follows :1.Aiming at the problem of insufficient detection sensitivity of the general method,the frequency domain constant false alarm rate detection method is used to detect the signal in real time.This method can complete the frequency domain energy accumulation of the useful signal,and it still has good performance in the case of low signal-to-noise ratio.At the same time,for the purpose of solving the problem that the measurement accuracy of frequency domain parameters and the measurement accuracy of time domain parameters are mutually restricted when the pulse description word(PDW)is formed,a rough measurement + precise measurement frequency measurement algorithm is proposed.Making time domain resolution and frequency domain resolution achieve better results at the same time.The measurement results are counted to verify the effectiveness of the reconnaissance processing algorithm at high sampling rate situation through simulation.2.Study a variety of jamming styles,including suppressive jamming,deceptive jamming,and periodic intermittent sampling jamming.The mechanism of each interference effect is deduced in detail,and the interference effect is verified by simulation.At the same time,the principle of a jamming generation structure based on reconnaissance guidance is introduced,and the influence of the reconnaissance parameters on the jamming generation effect is analyzed,which lays the foundation for the real-time processing design of the later reconnaissance and jamming.3.Design the real-time processing program of the reconnaissance and jamming based on the FPGA hardware platform,combined with the basis of the reconnaissance and jamming algorithm.The process of real-time processing program design is expounded from the two aspects of overall program design and core module design.The programming of the reconnaissance subsystem fully considers the advantages of FPGA’s parallel pipeline processing when implementing the algorithm,and adopts a variety of parallel computing structures,such as parallel Fast Fourier Transform(FFT)calculation,parallel multiply-accumulate calculation etc,so that FPGA processing rate can be matched to the high sampling rate of the analog-to-digital converter(ADC)to meet real-time processing.In the programming of the interference subsystem,the basic modules required by different interference patterns are implemented and verified by simulation,and then the generation of interference waveforms is completed through the calling and cooperation between modules.Finally,a hardware experimental environment is built,and the test results and resource utilization are analyzed to verify the effectiveness and feasibility of the design.