Design And Implementation Of Electronic Reconnaissance Preprocessing

In the traditional electronic reconnaissance equipment,some algorithms with high complexity,such as the intra-pulse modulation recognition algorithm,are usually implemented in DSP.This method has poor real-time performance and cannot realize the identification of pulses one by one,so that the modulation type cannot be used as a sorting basis,which will have an impact on subsequent pulse sorting and other algorithms.In order to realize pulse-by-pulse real-time preprocessing of algorithms such as intra-pulse modulation recognition,this thesis uses the advantages of FPGA platform data parallel pipeline processing to study the electronic reconnaissance preprocessing technology based on FPGA platform.The main research contents are as follows:1.Aiming at the problems of high sampling rate of electronic reconnaissance input signal,difficult to ensure the sensitivity of small signal processing and meet the clock constraints of FPGA pipeline,the methods of digital channelization,pulse detection and parameter estimation in electronic reconnaissance signal preprocessing are studied.Firstly,the digital channelization structure based on polyphase filter is studied.Aiming at the problems of channel aliasing and detection blind zone in the traditional odd and even channel division method,the digital channelization structure of odd and even parallel channel division method is proposed by improving its channel division method,and its effectiveness is proved by simulation.Then,the signal detection method and conventional parameter extraction method in the preprocessing algorithm are studied.The reliability detection of radar signal and the extraction of signal parameters in time domain and frequency domain are realized.2.The intra-pulse characteristic information of the radar signal instantaneous frequency law(IFL)and instantaneous frequency rate(IFR)are analyzed.Aiming at the problem that the phase difference method is difficult to extract the characteristics of signal IFL and IFR curves under low signal-to-noise ratio,the IFL and IFR curve estimation method based on the generalized representation of phase derivatives(GRPD)theory is studied.By extracting the mutation peak proportion of IFR curve,the autocorrelation coefficient and the normalized variance of IFL curve as the recognition feature vector,combined with the idea of decision tree,a combined IFL and IFR decision tree identification algorithm based on GRPD theory is proposed.Simulation experiments show that the proposed algorithm can effectively realize the identification of signal modulation types under the condition of low signal-tonoise ratio.3.The reconnaissance signal preprocessing algorithm based on FPGA platform is designed,including parity parallel digital channelization,pulse detection,time domain parameter and frequency domain parameter extraction methods.Aiming at the problem of poor real-time performance of traditional complex intra-pulse modulation identification algorithm on DSP platform,an algorithm suitable for FPGA platform to identify the type of radar signal intrapulse modulation in real-time pulse by pulse under low signal-to-noise ratio is designed.Then,the designed algorithm is verified on the hardware verification platform.The results show that the designed electronic reconnaissance preprocessing algorithm can complete the reception,detection,parameter estimation and modulation recognition of radar signals in real time,which verifies the correctness of the designed algorithm and the theoretical analysis in this thesis.