Research And Design Of Analog Front-End Circuit For Neural Electric Signal Acquisition

Thanks to the development of the Internet of Things and integrated circuits,intelligent medical devices are gradually coming into people’s lives.The research and application of neural electric signal monitoring will help to detect diseases in time and even promote medical progress.Especially in the future "5G + medical health" background,it has broad market prospects and far-reaching research significance.As an important part of the neural electric signal acquisition system,the analog front-end chip has aroused great research interest of scholars at home and abroad.This paper studies and designs an analog front-end circuit with low power,low noise,high linearity and high input impedance according to the requirements of performance indicators such as power,noise,linearity and input impedance in the process of neural electric signal acquisition.This is of the reference value for the development of neural electric signal acquisition chips.Aiming at the characteristics of weak amplitude and low frequency of neural electric signals,and acquisition process easy to be interfered by electrode DC offset(EDO),power line,noise,etc.This paper studies and designs a kind of analog front-end circuit,consisting of a low noise amplifier(LNA)module,a programmable gain amplifier(PGA)and low-pass filter(LPF)hybrid module.LNA adopts a capacitive-coupled chopper-stabilized amplifier structure,and employs current reuse and transconductance bootstrap technology to reduce power and noise;PGA and LPF use two-module fusion design and switched capacitor circuit structure,and utilize offset storage capacitors to reduce amplifier offset.For EDO suppression,a DC servo loop is added to the LNA,and the linearity of the pseudo-resistance is improved;For interference suppression,an impedance boost loop with external adjustable capacitor is added to the LNA devoted to impedance boost.The entire analog front-end circuit adopts a fully differential structure,and the output end of the amplifier is connected to the common mode negative feedback.In addition,by optimizing the input and output mode of the internal amplifier and using the capacitance ratio to achieve closed-loop amplification,the circuit linearity and swing are improved.This paper is based on SMIC 55 nm CMOS process,and the post-simulation results show that the LNA achieves an NEF of 2.32 within 0.4～5.3k Hz,and the input impedance can reach 545MΩ at 50 Hz.What’s more,the voltage characteristics simulation and Monte Carlo analysis of the pseudo-resistor show,compared with the traditional structure,the linearity and mismatch characteristics of the improved pseudo-resistor in this paper get greatly improved within a certain range.In the PGA-LPF,without consideration of offset,the THD is-64.2d B with the output signal of 1k Hz and 390 m Vpp;under the input signal of 10 m V offset,1k Hz and 100 m V,the capacity of offset suppression from offset storage capacitor in circuit can reach 17.6d B.Finally,the system simulation shows that the overall circuit consumes 2.89μW,of which the LNA consumes 1.49μW and the PGA-LPF consumes 1.4μW.The circuit passband achieves a programmable gain of 40～64d B with steps of 6d B,and has low sensitivity to the process.The overall CMRR and PSRR of the circuit exceed 96 d B and87 d B,respectively;under the input signal of 1k Hz and 1m V,the output swing can reach384.2m Vpp,and the THD is 59.2d B.The analog front-end circuit designed for neural electric signal acquisition basically meets the requirements of low power,low noise,high linearity and high input impedance.The postsimulation results verify the validity of the selected structure and theoretical analysis,which has reference significance for the research of high-performance analog front-end circuits toward neural electric signal acquisition.