Research On Ku-band Bi-directional Active Digital Phase Shifter

With the development of the modern communication technology,the phased array system has been applied more and more.The phase shifter is one of the core circuits in the phased array system.The performance of the phase shifter determines the performance of the phased array system.The active phase shifter has the advantages of high precision and miniaturization,while bi-directional active phase shifter can simplify the structure of the transceiver front-end,further improving integration and reducing costs.In this thesis,the Ku-band bi-directional digital active phase shifter is studied.The main research contents are as follows:Aiming at the problem of narrow band of bi-directional active phase shifter,a wideband bi-directional active phase shifter based on reconfigurable matching network is proposed.The reconfigurable matching network is used to expand the bandwidth by changing the topology according to the direction.The bi-direction phase shifter is achieved utilizing the orthogonal signal generator/sum circuit,bi-directional variable gain amplifier and reconfigurable matching network.A phase shifter is realized based on the55 nm CMOS process.The bandwidth is from 14 GHz to 18 GHz.The gain ranges from-4 d B to-1 d B.The gain RMS error ranges from 0.2 d B to 0.5 d B.The phase RMS error ranges from 1.3°to 2.7°.The chip area is 0.91 mm~2.According to the measurement,the phase shifter can realize bidirectional phase shift.In order to compact the structure of the phase shifter and improve the low accuracy caused by the orthogonal signal generator/sum circuit,a wideband bi-directional active phase shifter based on a 45 degree phase shifting network is proposed.The generation of the orthogonal signal is changed into two signals with 45 degree phase shifting,which avoids the use of orthogonal signal generation/synthesis circuit,reducing the complexity of the circuit and improving the accuracy.To verify the proposed method,a phase shifter is realized based on the 55 nm CMOS process.The bandwidth is from 14 GHz to 18 GHz.The gain RMS error of two directions is less than 1.05 d B and 1.7 d B,respectively.The phase RMS error is less than 2.1°.The chip area is 0.91 mm~2,with the power consumption of 28.8 m W.The phase accuracy has been improved.