Design Of A High Precision Discrete-Time Sigma-Delta Modulator

With the prevalence of the Internet of Things,the demand for small-area and energyefficient electronic systems for ubiquitous smart devices continues to grow.In a highly integrated CMOS system-on-chip,the digital part can achieve high-speed and low-power performance thanks to ongoing technology expansion.Conversely,analog design is becoming more and more challenging as the voltage headroom decreases.This dilemma is prevalent in the design of ADCs.The technology of Sigma-Delta ADC does not depend on voltage headroom,and can achieve high effective number of bits,so it is favored by many designers.Thesis mainly designs a high-precision Discrete-Time Sigma-Delta modulator,which achieves a static effective resolution of 21.43 bits.According to the design requirements,use MATLAB to calculate the various coefficients of the modulator,and then use MATLAB-Simulink to model the overall architecture of the Discrete-Time Sigma-Delta modulator.The overall architecture of the modulator can be determined according to the application and performance requirements.In order to realize the highprecision Sigma-Delta modulator,a second-order discrete Sigma-Delta modulator with feedforward is adopted in this thesis.The quantizer in a Sigma-Delta modulator affects its linearity and stability.One-bit quantizers are inherently linear,but are prone to overload and instability of the integrator.Although the multi-bit quantizer can alleviate the integrator overload problem,due to the mismatch of the analog components of the feedback DAC,nonlinearity is introduced,which seriously affects the modulator performance.In this thesis,a 3bits quantizer is used,and a Data Weighted Average(DWA)algorithm is used to calibrate the mismatch of the feedback DAC components.The high-precision Discrete-Time Sigma-Delta modulator designed in this thesis adopts 40 nm CMOS process and the working voltage is 2.5 V.The final test result is:when the downsampling frequency fs=0.95 Hz,the static effective resolution is 21.43 bits.