Design Of Energy-efficient Reconfigurable Spiking Neural Network Processor

With the enhancement of algorithm,computing power and data processing ability,artificial intelligence technology represented by artificial neural network has achieved rapid development and has been applied in many aspects of production and life.Artificial neural network models such as convolutional neural network and long and short term memory network have been widely used in target detection,image classification,speech recognition and other tasks,and achieved good results.However,artificial neural network is the modeling of the structure of biological neural network,but does not mimic the physiological characteristics of biological neurons.Even a very small input artificial neural network needs to update the state of all the neurons in the network.Therefore,the energy consumption of artificial neural network with the same structure is much higher than that of biological brain.As the next generation of neural network technology,spiking neural network(also called neuromorphic computing)mimics the physiological characteristics of biological neurons and is considered to have the potential to perform tasks with low energy consumption.Similar to artificial neural networks,spiking neural networks also require dedicated hardware acceleration.However,the research of spiking neural network hardware is not deep enough,and the speed and energy consumption still have a large space to improve.In this thesis,the existing spiking neural network algorithm and hardware are investigated,and the advantages and disadvantages of the existing hardware design are analyzed and compared.Secondly,this thesis proposes a design scheme of high energy efficiency reconfigurable spiking neural network processor for existing problems,which contains the following major innovations:(1)A technique of sharing computing resources in neighbour cores is proposed,which can accelerate the overall computing speed by borrowing neighbour computing resources when there are many computing requests in one core but neighbour computing resources are idle.(2)A new communication strategy for spiking neural network processor is proposed,which enables one neuron to propagate at most one spiking packet in each update and greatly reduces the requirement of communication bandwidth.(3)The architecture of reconfigurable spike computing engine is proposed,which realizes inference and learning computing simultaneously through hardware resource reuse and improves the utilization of hardware resources.(4)An adaptive spike computation mechanism is proposed to reduce energy consumption while ensuring accuracy.For the proposed energy efficient reconfigurable spiking neural network processor,the hardware implementation and downstream verification are carried out on Xilinx Virtex7 FPGA.MNIST data sets were used for inference and unsupervised learning tests.At 100 MHz processing frequency,single image inference time was 3.15 ms,single image inference energy consumption was 4.85 m J,single image learning time was 16.30 ms,single image learning energy consumption was 20.73 m J.Compared with some existing spiking neural network processors,it achieves better energy consumption and faster processing speed.