Design And Implementation Of Low Power,Reconfigurable,Modular Spiking Neural Network Processor

With the development of artificial neural network research and its wide application in the field of artificial intelligence,Artificial neural networks show their unique advantages over traditional artificial intelligence algorithms.The essence of artificial intelligence is the simulation of the human thinking process.Artificial neural networks abstract the results of brain science on the structure and dynamic processes of the human brain.An artificial intelligence algorithm that is simplified.However,it is closer to the real brainlike calculations,The more biologically inspiring neural network is the spiking neural network.After years of development,artificial neural networks have a variety of dedicated accelerator platforms deployed in the cloud.Online neural network training and inferring.However,event-driven computing in spiking neural networks is particularly well-suited for low-power hardware implementations,meeting the needs of end-to-end applications.However,the existing spiking neural network hardware system is difficult to adapt to complex end-side scenarios in terms of power consumption and reconfigurability.Therefore,it is necessary to design a low-power,reconfigurable,modular spiking neural network processor.This paper first briefly introduces some background knowledge of spiking neural networks.Including the similarities and differences of spiking neural network and artificial neural network,various neuron models and learning algorithms in spiking neural network,and select appropriate neuron model and learning algorithm to be used to construct the spiking neural network model used in this paper.In addition,the design idea of the current mainstream neural network chip is introduced.Combined with the low power consumption,reconfigurable and modular design requirements,the guiding design criteria of the spiking neural network processor system are proposed.Secondly,the overall architecture of the spiking neural network processor system is established.The functions and ports of each submodule and the specific transmission data format are defined in detail.According to the resource condition and design performance requirements of the FPGA hardware,the proposed sub-module is implemented.And the low power consumption optimization is carried out under the premise of ensuring the correct function.In addition,the way to configure the hardware global parameters,establish a real spiking neural network model,and use this as an example to illustrate how to calculate and obtain global parameters.Finally,in order to verify the effectiveness of the overall architecture and evaluate the performance of the architecture,this paper uses the spiking neural network transformed by artificial neural network as a reference model to construct a spiking neural network processor system.The MNIST data set was used as a test sample.The spiking neural network is implemented using the XC7VX485 T FPGA chip.After the network weights and parameters are imported,the clock frequency can reach 200 MHz,the recognition accuracy reaches 93%,and the system dynamic power consumption is 65 mW.