Machine Learning Based Cache Prefetcher Design

Cache data prefetching which can minify the increasing performance gap between the processor and the main memory is an important technology.Although the concept of cache data prefetching has been proposed for decades,there are some exist problems in the current prefetching technology.Software prefetching can only handle regular memory accesses;while the hardware prefetching requires a trade-off between using more metadata to discover more processor access patterns and reducing the additional storage cost.What's more,the current LSTM neural network has shown good results in sequence prediction,so a spatio-temporal prefetcher which is based on the LSTM neural network is designed in this paper,which is called ST Predict.In this thesis,the ST Predict Prefetcher which is based on machine learning is introduced after analyzing the shortcomings of the current hardware prefetcher and software prefetcher.The design process of the ST Predict prefetcher mainly includes:modifying the Gem5 source code to obtain the original input data set,processing the input data to reduce the prediction space of the LSTM neural network,building the ST Predict prefetcher,and adjusting the parameters of the neural network hyperparameters.Finally,the method of evaluating the ST Predict prefetcher is introduced.This thesis chooses to use the SPEC2006 benchmark to verify the performance of the ST Predict prefetcher on the Gem5 simulator.Compared to the case of no prefetcher,our proposed model can improve on performance by up to 24.24%.and by15.42% on average.ST Predict improves upon the performance of SPP(Signature Path Confidence Based Prefetcher)by 5.15% on average,improves upon the performance of BO(Best Offset Prefetcher)by 13.32% on average,improves upon the performance of ISB(Irregular Stream Buffer)by 13.73% on average,.In terms of additional hardware costs,the storage efficiency of the ST Predict prefetcher is twice than the ISB prefetcher.