Design Of Embedded Multi-FPGAs Heterogeneous Computing System

With the development of science & technology and digital information society,the explosive growth of data brings severe challenges to the traditional high-performance computing system.While semiconductor technology gradually approaching its physical limitation,the performance increasing of single platform processing is difficult to meet people's computing demand.In the face of the increasing algorithm complexity and system performance demand,heterogeneous computing platforms which combine the advantages of different architectures show great potential.Among the coprocessing devices in heterogeneous systems,FPGA has broad application prospects in signal processing,high frequency trading and artificial intelligence due to its excellent characteristics of high energy efficiency and low latency.At the same time,the proposal and application of Open CL standard,a heterogeneous platform framework,also brings a new idea for heterogeneous computing based on FPGA.In this context,Altera and Xilinx manufacturers combine open computing language(Open CL)with FPGA,and propose hardware development kit based on high-level language and CPU + FPGA heterogeneous computing platform.To some extent,they improve the difficulties of traditional FPGA development,such as long developing period and high barriers,so that developers can carry out efficient FPGA application design in C environment to implement high performance and low power heterogeneous computing system.This paper takes the design of embedded multi-FPGA heterogeneous computing system as the topic.Firstly,it introduces the heterogeneous computing under Open CL standard and the technologies needed to build the heterogeneous platform such as SRIO high-speed serial bus protocol,AXI bus protocol on chip transmission and High-Level Synthesis,and then expounds the implementation mechanism and optimization strategy of Open CL on FPGA.After the investigation of heterogeneous computing system construction,this paper explores and designs the CPU + multi-FPGA embedded system and the corresponding development platform based on Open CL standard from the aspects of software architecture,communication,hardware platform framework,etc.,focusing on the communication design based on SRIO,instruction & data transmission structure on FPGA,development and control of kernel,event feedback mechanism,etc.Under the VPX basic specification,the Open CL heterogeneous computing system is designed and deployed on the T4240 CPU + multi-vx690 FPGA embedded system,and the SRIO switching structure is used to realize the communication between devices.At the same time,an example of radar resolution enhancement algorithm chain is designed(the algorithm chain includes three sub algorithm kernels: MTI preprocessing,pulse compression and phase accumulation,which are developed and optimized based on HLS method)for system verification and performance test.The experimental results show that the embedded multi-FPGA heterogeneous computing system designed in this paper correctly realizes the heterogeneous computing and corresponding API functions under the Open CL standard framework,and the maximum error is less than 10^-5 compared with the MATLAB calculation results.In terms of system performance,the transmission efficiency of SRIO interface is 86.55%,and the transmission efficiency of DDR interface is 76.48%.With multipipeline replication,direct data transmission between devices and multi-frame pipeline parallel strategy,the processing speed of the heterogeneous system is significantly improved by 9.2 times compared with CPU.And the optimized design also brings 78.4%processing efficiency over than the computing on single FPGA platform,realizing efficient multi-FPGA heterogeneous computing under the Open CL framework.