Research And Implementation Of Motion Compensation In End-cloud Fusion System

With the rapid popularization of ultra-high-definition digital TV,much more requirements for visual experience have been raised,but existing video sources cannot meet people's requirements.By inserting an intermediate frame between two consecutive original frames,the frame rate up conversion technology can effectively improve the subjective quality of video.When playing videos on display devices such as ultra-high-definition digital TVs,the frame rate up-conversion technology not only solves the problem of frame rate mismatch,but also improves the fuzzy and jitter of motion picture by improving the frame rate of video.Entering the era of 4K/8K and high frame rate,the problems of motion blur and jitter have become more prominent.In addition,real-time frame rate up-conversion of high-resolution,high-frame-rate video is realized on the image processing chip,which greatly increases the area and power consumption of the frame rate up-conversion module.To solve the above problems,based on the in-depth study of the existing motion estimation and motion compensation algorithms,two research objectives are proposed in this paper:one is to reduce the area and power consumption of the frame rate up-conversion module in the chip;the other is to design a motion compensation interpolation algorithm considering the engineering realizability and frame rate up-conversion effect,and part of the algorithm is implemented in logic.The top-down design method is adopted in this paper.Firstly,based on the existing implementation scheme of frame rate up conversion,combined with the concept of end cloud fusion,the end-cloud fusion motion estimation and motion compensation system is proposed;Then,a motion compensation interpolation algorithm is designed and simulated with MATLAB;Finally,the logic architecture of the motion compensation subsystem is designed,and the most critical interpolation module is implemented and verified.The PSNR results of this algorithm and other algorithms are compared through experiments,and it is proved that the motion compensation algorithm proposed in this paper has a certain frame rate up-conversion effect.In this paper,syntax check,function verification,performance verification,synthesis and power consumption simulation are carried out for the interpolation module.The simulation results show that the interpolation module can not only be implemented by logic,but also meet the design specifications.Under the 28 nm process of a certain manufacturer,the APB clock is set as 300 MHz,and the module working clock is set as 600 MHz.The integrated area of the interpolation module is 54480?m~2.Power Artist tool is used to simulate the power consumption of the interpolation module,and the total power consumption of the interpolation module is 6.68 m W.