Research On Algorithm And Implementation Of Frame Rate Up-Conversion

As an important video post-processing technique,frame rate up-conversion(FRUC)converts a low-frame-rate video to a higher one by inserting the intermediate frames,so as to improve the subjective quality.At present,the popular applications of FRUC technique include: solving frame rate conversion among various multimedia terminal equipment;eliminating motion judder and motion blur when low frame rate video played on digital TV,to provide viewers with a smoother visual experience;recovering the dropped original frames in the low-bit-rate video transmission system,to avoid the sense of scene jumping caused by low frame rate.Currently,FRUC methods based on motion compensation technique become a mainstream.Motion vectors used in motion compensation can be obtained from the stream information,also can be estimated through motion re-estimation at the decoder side.This paper takes the FRUC algorithm based on motion re-estimation as the main content,using block-based motion compensation method as the technical route.For difficult problems like true motion estimation,motion vector field post-processing,occlusion handling motion compensation and hardware implementation,this thesis carries on deep analysis and puts forward effective solutions.The main contents of this paper are as follows:Under the background of National Science and Technology Major Project,we propose a hardware architecture for FRUC,based on low complexity and low bandwidth constraints.Through parallel post-processing,the system improves the data reuse among motion estimation,motion vector processing and motion compensation.An efficient on-chip storage strategy is designed to meet the random access of blocks in various size;A three-stage pipeline design is also proposed,which manages reasonably the access requirement of each module to the pixel cache and improves the operating efficiency of the system.For the problem of the existing motion estimation framework,we propose a joint motion estimation based on Kalman filtering.The method establishes the state model and the observation model of the motion vector field,which reduces the error between the estimate value and the true motion trajectory through the recursive filtering.In the process of acquiring the observed motion vector field,the method of combining unilateral motion estimation and bilateral motion vector projection is used,which avoids the ”hole” and ”overlapping” problem,and improves the accuracy of motion vectors.As for the possibly existing of unreliable motion vectors in the initial motion vector field,by introducing multilevel motion vector processing method,this paper is to improve the consistency and accuracy of the motion vector field.Compared with the traditional algorithms,the proposed algorithm analyzes the orientations of the motion boundaries to select more suitable candidates for motion refinement.Then,a robust trilateral filter is designed by considering the local smoothness of the motion vectors,the matching error and the possibility of the boundary,avoiding over-smoothing and dissemination of unreliable motion vectors.In view of the problem that the occlusion area can not be compensated accurately,the paper studies the reason why occlusion occurs,and utilizes the characteristics of the pixels and the motion vector field in occlusion area to put forward a method of overlapped block motion compensation based on occlusion handling.The method can detect the occlusion area,and utilize accurate motion compensation.In order to better implement the above algorithms in hardware,the thesis further optimizes the complexity to make a better balance between computational complexity and algorithm performance.On this basis,a hardware architecture for the improved algorithm is proposed,laying the foundation for the next-generation FRUC IP core.Various experiments for the proposed algorithm are carried on.Experimental results show that compared with the existing algorithms,the proposed algorithm obtain better subjective and objective effects.Besides,in this thesis,the proposed hardware architecture and implementation scheme are fully theoretically analyzed.Since similar scheme has been applied in the Chinese National Key Science and Technology Special Program,the proposed scheme proves to be feasible and effective.