Design And Key Technology Of Vertical Power MOSFETs With Partial Heterojunction

The development of electronic products has entered a new stage of energy saving and high efficiency due to the appearance of power MOS devices.In order to further reduce the characteristic impedance and improve the integration,the research focus of power MOS de-vices has begun to shift to the vertical MOSFET structure,which represented by VDMOS structure and UMOS structure,both structures are ideal power devices for both switching applications and linear applications.The optimization goal of power semiconductors is to obtain high breakdown voltage(BV)and low specific on-resistance(R_on,sp),and to break the limit relationship between the two.With silicon(Si)Material-based power semiconduc-tor devices are gradually approaching the theoretical limit.The use of wide-bandgap semi-conductor materials,represented by silicon carbide(SiC)and galliumnitride(GaN),shows superior performance than Si,such as higher critical breakdown electric field,higher switch-ing speed,etc.,However,Si materials is still widely used due to its mature technology level.This paper proposes a vertical device with a partial heterojunction,which is a new idea that combines the advantages of these two types of materials.It not only uses the mature tech-nology of Si materials,but also combines the advantages of SiC and GaN.At the same time,the interface state problem caused by the inconsistency of the thermal expansion coefficients of the Si material and the SiC/GaN material in the heterojunction is solved,which caused many unpredictable risks in its impact on device performance and reliability.In summary,the innovations and main work of this article are as follows:(1)Design a new type of VDMOS with partial heterojunction,which mainly includes par-tial SiC/Si VDMOS and partial GaN/Si VDMOS,which is characterized by the formation of partial heterojunction with a combination of SiC/GaN and Si materials on the epitax-ial layer.Using the breakdown point transfer technology,compared with the Si VDMOS,when the drift region length is 15?m,the BV of partial SiC/Si VDMOS is increased from238V to 343V,with an increase of 44%,while the BV of partial GaN/Si VDMOS increased from 238V to 325V,with an increase of 37%.The R_on,spof partial SiC/Si VDMOS is10.56m?·cm²,which is 26%smaller than Si VDMOS and 85%less than SiC/Si VDMOS.The R_on,spof partial GaN/Si VDMOS is 10.17m?·cm²,which is 29%less than Si VDMOS and 76%less than GaN/Si VDMOS,improving the contradictory relationship between BV and R_on,sp.The silicon-based MOS channel is applied in the vertical direction in the mid-dle,and the interface Charge is introduced,simulation shows,partial SiC/Si VDMOS and partial GaN/Si VDMOS alleviate the influence of dangling bonds on the interface on the heterojunction,especially when the acceptor interface charge is introduced,Compared with SiC/Si VDMOS and GaN/Si VDMOS,the problem that the device cannot be turned on due to the accumulation of electrons on the interface is also solved.In addition,two-dimensional Poisson equations of partial SiC/Si VDMOS were established through boundary conditions,and two-dimensional numerical models of the potential and electric field of the drift region were obtained.The simulation results were fitted to the model by changing the length of the drift region of the device,and the fitting Good curve distribution.(2)Design a new type of UMOS structure with partial heterojunction,mainly including par-tial SiC/Si UMOS and partial GaN/Si UMOS,which is characterized by the stepped trench and the drift region also has a combination of SiC/GaN and Si materials.The breakdown point is shifted from the corner of the trench where the electric field lines are dense,and the withstand voltage of the device has been greatly improved.Compared with the Si UMOS,the BV of partial SiC/Si UMOS is from 138V increased to 283V,with an increase of 105%,the BV of partial GaN/Si UMOS increased from 138V to 279V,with an increase of 102%.At the same time,the R_on,spof partial SiC/Si UMOS is 2.25m?·cm²,which is 39%less than Si UMOS and 26%less than SiC/Si UMOS,the R_on,spof partial GaN/Si UMOS is2.34m?·cm²,which is 37%less than Si UMOS and 28%less than GaN/Si UMOS.In addition,in view of the interface state problem of UMOS heterojunction,the new UMOS structure with partial heterojunction has also improved it.The results show,When the donor-type interface charge is introduced,as the charge density increases,R_on,spwill decrease a little,because the R_on,spof UMOS itself is relatively small;When the acceptor-type inter-face charge is introduced,the spike barriers at all heterojunctions cause the accumulation of electrons when the current passes,causing R_on,spto be too large and even unable to con-duct.However,the design of partial heterojunction makes the current flow smoothly to the Si channel,alleviating the interface state problem.