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A Label-based Hierarchical Memory System

Posted on:2022-08-11Degree:MasterType:Thesis
Country:ChinaCandidate:J N JiaFull Text:PDF
GTID:2518306572490914Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
Data growth encourages computer memory systems to provide greater capacity of memory.Due to the challenges in terms of density scaling and power leakage,traditional Dynamic Random-access Memory(DRAM)technology can't meet the performance demands of systems and applications.Emerging Non-Volatile Memory(NVM)technologies generally offer higher memory density,much lower cost-per-bit and standby power consumption than DRAM.However,NVM also suffers from the limited endurance and low write performance.These disadvantages make it hard to become an efficient substitute for DRAM.Thus,holistic memory architectures consisting of both DRAM and NVM are hence proposed to build high-performance,large-capacity,and energy-efficient memory systems.The appearance and wide use of memory technologies bring significant changes to the conventional vertical memory hierarchy that fails to handle contentions for shared hardware resources and expensive data movements.To deal with these problems,this study proposes La Mem,a labeled,resource-isolated and cross-tiered memory system.La Mem maintains an efficient abstraction of memory hierarchies,called Label,which is used to establish the connection between application layer and underlying hardware layer,to guarantee qualify-of-service(Qo S)demands of applications.Specifically,La Mem leverages the way-based partitioning technique for mitigating performance interference induced by cross-application resource contentions,while providing the Qo S-oriented resource allocation strategy and shortcut policy to deliver differentiated levels of performance,and decrease data movements among increasing memory hierarchies.Moreover,La Mem presents a fast and low-overhead lazyrepartitioning technique to support dynamic resource adjustments.Experimental results show that LaMem achieves better execution performance and few data movements compared with existing memory systems,while avoiding the extra time overhead and performance slowdown over the flush-based repartitioning baseline during dynamic adjustment period.
Keywords/Search Tags:Memory system, Cache hierarchy, Data movement
PDF Full Text Request
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