Local memory store (LMStr): A scratchpad memory for high performance computing

Caches hide memory latency and decrease data movement from/to memory. The cache treats all program variables the same which can introduce unnecessary data movement. Moreover, to keep the shared data coherent, cache coherence protocols cause further data movement. Computer architects have designed scratch-pad memory (SPM) that stores data under process control. However, managing multi-threaded applications and sharing resources between multiple processes in SPM is a complex design challenge. We present an on-chip memory called Local Memory Store (LMStr)1 which can be used either solely as SPM or as a combination of SPM assisted by cache and is shared among cores in a multicore system. LMStr simplifies the sharing of resources by transforming the control of the SPM solely from the compiler to the compiler plus hardware. We focus on storing critical data in SPM under the control of the compiler/programmer according to the variable types (eg. local, global, or temporary) and explore sharing of the SPM among cores. We evaluate our design using a set of mini applications including a matrix multiplication micro-application and multiple Mantevo mini-applications. Our results show that LMStr can improve data movement by up to 21% compared to cache while storing specific types of variables in scratchpad and the remaining data in cache incurring only 3% area overhead.;1The original idea and functionality of LMStr was outlined by David Resnick of Sandia National Laboratory. LMStr is Applied for patent by Sandia National Laboratory.