Design And Implementation Of Multiple Convolutional Neural Network Tasks Real-time Switching System Based On FPGA

The CPU based on the control architecture cannot deeply optimize the calculation of the Convolutional Neural Network(CNN),and it is difficult to meet the application requirements in terms of speed and power consumption.The computationally intensive FPGA is suitable for the development of parallel computing,and has the characteristics of configurability,short development cycle,and low cost,so it has become a popular platform for CNN deployment.However,the CNN model is large,the computation is complex,and the FPGA resources are limited.Therefore,how to implement real-time computation of multiple CNN tasks in FPGAs is still challenging.Aiming at the above problems,this thesis carried out the research on multiple CNN tasks calculation,and designed a multiple CNN tasks switching architecture based on FPGA.The "task sequence + control module" method is adopted to control the whole system to calculate and switch according to the priority of the CNN task,so as to improve the real-time and flexibility of the system.In view of the layer computing characteristics of CNN,a general layer switching mechanism and a real-time layer switching mechanism are proposed.When the tasks calculated in the system need to be switched,the switching points is selected between two similar hidden layers to reduce the complexity of the system and the difficulty of multi-tasks switching.During the deployment of the CNN,the calculation of the CNN is divided into configurable basic computing units,and the overhead of FPGA resources is reduced by reusing the computing units.When the convolution layer is calculated,the structure of parallel calculation inside the convolution window is used to improve the calculation speed of the task.The handwritten number recognition network is deployed on the FPGA for verification,the experimental results show that,at 50 MHz working frequency,when there are 3 handwritten number recognition tasks with different priorities,the real-time layer switching mechanism can make the highest priority task fastest 57.26 ms was response ahead of time,the ordinary layer switching mechanism can also improve the system's response speed to high priority tasks;the configurable design reduces(except BRAM)the computing resource overhead by more than 50%;for the recognition of a single picture,the average speed of FPGA is 4.51 times that of CPU,and power consumption is 40.25% of CPU.