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Research On Verification Of Multiple Error Injection Direct Link Interface Based On Coverage Driven

Posted on:2022-09-06Degree:MasterType:Thesis
Country:ChinaCandidate:J H LiFull Text:PDF
GTID:2518306542962199Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
The verification platform written by traditional Verilog takes a lot of time and has poor reusability.Most of the time is spent on the test platform itself rather than verifying the essence of the design.With the improvement of chip functions and integration and shortening the time to market,efficient and reusable verification methods to ensure the correctness of the design are imminent.The verification method based on UVM coverage driven has reusability and aims at the functions of the design itself.The verified functions are displayed in the form of coverage,so that the progress can be grasped in real time.Random testing with constraints ensures verification to various test scenarios.DLI(Direct Link Interface)is the basis of multicore processor interconnection to form a shared storage structure,which ensures the fast access and communication between processors,so as to expand the main memory capacity and bandwidth,it is secondary development based on PCIe that can achieve high-speed data transmission and overcome the problem of high latency.Therefore,the use of efficient UVM methodology for rapid and sufficient verification not only shortens the development cycle,but also ensures the interconnection between processors,which has important practical value and research significance.Based on the complex functional design of DLI,this paper builds a coverage-driven multifault verification platform,completes the design of various components and multiple error injection methods within the environment,and performs system verification on DLI.First,it focuses on the internal structure of the Direct Link Interface,and analyzes the functions of the internal modules.The sending channel and receiving channel of the Direct Link Interface are independent of each other.The six types of messages received from the processor are used for different functional messages,and the messages are further split and transmitted inside the interface for link,retransmission and flow control etc.Based on the channel characteristic of the interface sending and receiving messages at the same time,the two interfaces receive and send messages to each other in the verification environment.According to the characteristics of the verification environment and the design itself,a new error injection method is proposed.In addition to the traditional sequence error injection,the error bus proxy is used for error injection between the two interfaces,and one of the DLIs uses the error model for error injection.There are three error injection methods,and the trend of the coverage rate with the number of error injections is calculated.In the later stage of the verification,focus verification and constrained random test verification are used to speed up the verification progress.The coverage driven UVM verification method can confirm the verified functionsin real time,and multiple error injections ensure the robustness of the design.The maintenance of the environment and the processing of data text by perl scripts make the environment more convenient and flexible.Finally,use the designed verification environment and multiple error injection methods to verify DLI.When error injection is enabled,the function coverage will decrease as the number of error injections increases,and DLI can respond correctly to different errors.When the error injection is turned off,the full coverage of function and 99% coverage of code are realized.The code that is not covered has been confirmed by the designer,and the functional verification of DLI has been completed.The verification environment,error injection and The validation method can be reused.
Keywords/Search Tags:UVM, Coverage, DLI, Error Injection, Constrained Random Test
PDF Full Text Request
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