Reconfigurable Design And Hardware Implementation Of Block Cipher Algorithm

With the rapid development of computer science and network communication,the importance of information security is increasing.In order to ensure that private or confidential data are not stolen and tampered with,cryptographic algorithms have become a vital means of password protection.Among them,AES and SM4 algorithms are widely used in wireless sensor networks and intelligent devices in the Internet of Things block cipher algorithms.However,in the existing security chips that integrate the two algorithms,AES and SM4 are mostly implemented independently,which cannot fully optimize the hardware implementation by using the similar structure of the two algorithms,and with the development of side-channel attacks,the security chips lack effective protection design.Therefore,it is very important to design AES and SM4 with reconfigurable idea against side channel attack.This paper mainly studies the hardware implementation methods of reconfigurable and anti-attack AES and SM4.Firstly,the cryptographic algorithms and the basic principles of side channel attack are introduced,and the common side channel attack methods are analyzed by power consumption model.Then,the reconfigurable hardware scheme of AES and SM4 is studied,and the reconfigurable design of S box,column mixture,controller and interface is determined through the analysis of reconfigurable modules.After the architecture of the encryption system is proposed based on the idea of software and hardware collaboration,a reconfigurable S-box is realized by using the method of composite domain computing,which makes three different S-boxes merge into one.For column mixing,matrix decomposition method is used,so that the inverse column mixing in AES decryption can reuse the operation structure of encrypted column mixing.Controller and module interfaces are also integrated through state jump and interface signal merging,thus reducing hardware overhead.In the aspect of anti-attack design,based on the common protection measures,a reconfigurable mask S-box is designed to solve the problem of zero-value mask,and the mask is modified by sections in the S-box,so that it can resist power attack.For the fault attack,this paper combines the dual path and parity check,and designs the error detection scheme of AES and SM4 by modules,and judges whether the operation is wrong by comparing the values of the two paths or parity check codes in each round.AES and SM4 encryption circuits designed in this paper are verified and analyzed from three aspects of function,anti-attack ability and performance.In terms of encryption and decryption function,RTL code of the algorithm is fully verified based on Testbench,UVM and FPGA.In terms of anti-attack ability,the designed algorithm is attacked by using CPA and DFA.The results show that the anti-attack design can effectively resist power attack and fault attack.Finally,the area and power consumption of the reconfigurable AES and SM4 are reduced by 11.4% and 1.8% compared with that of the independently realized AES and SM4.The area and power consumption of the reconfigurable AES and SM4 are increased by 47.4%and 10.1%,respectively.Considering the security,algorithm compatibility and extra resource cost,the design of this paper has certain advantages.