Research On Compressed Sensing Codec Design And Hardware Implementation In Resource-constrained Environment

The signal processing technology based on compressed sensing does not need to follow the Nyquist sampling theorem,which can effectively reduce the amount of data transmitted and thus cut back the energy consumption of the device.It is suitable for scenarios where large-scale data needs to be processed but resources are extremely limited.For example,in the sensor network nodes of the Internet of Things,it is difficult for devices powered by tiny batteries to process and transmit the ever-increasing huge amount of data.The emergence of compressed sensing provides new solutions,so it has received extensive attention and research.However,the compressed signal will lose part of the accuracy during the reconstruction process.In order to improve the recovery effect,it is necessary to use appropriate measurement and reconstruction methods.Good-performance measurement-side encoders and reconstruction-side decoders usually consume more power and have higher implementation complexity.Therefore,there is an urgent need for a codec with both low power consumption and high performance.In the existing research,the implementation method of the codec still has the following shortcomings.At the measurement end,an encoder with strong adaptability and low power consumption is required.The random matrix can be used for most signal compression,but the implementation complexity is high.Although the sparse binary matrix is simple in structure,it is difficult to guarantee good incoherence with any dictionary due to its determinism,and its application range is limited.At the reconstruction end,there is a lack of decoders with both high performance and low complexity.The reconstruction algorithm that is mostly used in decoders is the OMP algorithm.Although it is simple to implement,OMP cannot use global information to get the optimal solution.Convex optimization algorithm has good reconstruction performance,but due to its high computational complexity,it is not suitable for resource-constrained scenarios.In order to solve the above-mentioned problems in compressed sensing measurement and reconstruction,this paper has carried out further research on the hardware implementation of the codec.The main research contents and contributions include as follow.(1)Based on the deterministic sparse binary matrix,we propose a random scrambling method SRSD that combines the advantages of the simple implementation of the binary matrix and the strong applicability of the random matrix.It only pays a small amount of hardware overhead and improves the deterministic sparse binary matrix.It only spends a small amount of hardware overhead to improve the perception ability of the deterministic sparse binary matrix.After experimental comparison and verification,the reconstruction performance of the proposed matrix under the BP and OMP algorithm is better than the Gaussian and a class of deterministic binary matrix.Under the same reconstruction performance,the power consumption of the SRSD matrix is only 25%of the determined binary one.(2)Through theoretical analysis of a class of weighted(?)₁ minimization algorithm,and according to its network topology and algorithm flow,we propose a hardware implementation scheme based on FPGA.Compared with the decoder that implements the OMP algorithm,the proposed design has the advantages of both resources and speed.Not only is it superior to the OMP algorithm in reconstruction performance,but the signal reconstruction speed is also faster when the resource consumption is similar.